Subject: Re: [PATCH v2 01/10] powerpc: Handle most loads and stores in instruction emulation code

From: Segher Boessenkool <[email-masked]>
Date: Sat, 26 Aug 2017 09:56:50 -0500

Hi Paul,

On Fri, Aug 25, 2017 at 03:41:53PM +1000, Paul Mackerras wrote:
> diff --git a/arch/powerpc/lib/ldstfp.S b/arch/powerpc/lib/ldstfp.S
> index a58777c..6840911 100644
> --- a/arch/powerpc/lib/ldstfp.S
> +++ b/arch/powerpc/lib/ldstfp.S
> @@ -178,10 +178,10 @@ _GLOBAL(do_stfd)
>  	EX_TABLE(2b,3b)
>  
>  #ifdef CONFIG_ALTIVEC
> -/* Get the contents of vrN into v0; N is in r3. */
> +/* Get the contents of vrN into v0; N is in r3. Doesn't touch r3 or r4. */
>  _GLOBAL(get_vr)
>  	mflr	r0
> -	rlwinm	r3,r3,3,0xf8
> +	rlwinm	r6,r3,3,0xf8
>  	bcl	20,31,1f
>  	blr			/* v0 is already in v0 */
>  	nop

Not new in your patch, but that bcl disturbs the link stack (only $+4
branches do not).

> +/* Convert single-precision to double, without disturbing FPRs. */
> +/* conv_sp_to_dp(double *dp, float *sp) */

That should be

+/* Convert double-precision to single, without disturbing FPRs. */
+/* conv_dp_to_sp(double *dp, float *sp) */

> +_GLOBAL(conv_dp_to_sp)

Segher