* [PATCH v2 0/7] powerpc/64s/radix TLB flush fixes and performance improvements
@ 2017-11-07 6:05 Nicholas Piggin
0 siblings, 0 replies; 2+ messages in thread
From: Nicholas Piggin @ 2017-11-07 6:05 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Nicholas Piggin, Aneesh Kumar K . V
Since the v1/RFC, I pulled the first 2 fix patches into this series,
and rediffed to powerpc merge branch. Dropped the final 2 patches
which were not completely agreed upon and baked.
Thanks,
Nick
Nicholas Piggin (7):
powerpc/64s/radix: tlbie improve preempt handling
powerpc/64s/radix: Fix process table entry cache invalidation
powerpc/64s/radix: optimize TLB range flush barriers
powerpc/64s/radix: Implement _tlbie(l)_va_range flush functions
powerpc/64s/radix: Optimize flush_tlb_range
powerpc/64s/radix: Introduce local single page ceiling for TLB range
flush
powerpc/64s/radix: Improve TLB flushing for page table freeing
arch/powerpc/include/asm/mmu_context.h | 4 +
arch/powerpc/mm/mmu_context_book3s64.c | 25 ++-
arch/powerpc/mm/tlb-radix.c | 318 ++++++++++++++++++++++++---------
3 files changed, 256 insertions(+), 91 deletions(-)
--
2.15.0
^ permalink raw reply [flat|nested] 2+ messages in thread
* [PATCH v2 0/7] powerpc/64s/radix TLB flush fixes and performance improvements
@ 2017-11-07 7:53 Nicholas Piggin
0 siblings, 0 replies; 2+ messages in thread
From: Nicholas Piggin @ 2017-11-07 7:53 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Nicholas Piggin, Aneesh Kumar K . V
Resending, sorry for the noise.
Since the v1/RFC, I pulled the first 2 fix patches into this series,
and rediffed to powerpc merge branch. Dropped the final 2 patches
which were not completely agreed upon and baked.
Thanks,
Nick
Nicholas Piggin (7):
powerpc/64s/radix: tlbie improve preempt handling
powerpc/64s/radix: Fix process table entry cache invalidation
powerpc/64s/radix: optimize TLB range flush barriers
powerpc/64s/radix: Implement _tlbie(l)_va_range flush functions
powerpc/64s/radix: Optimize flush_tlb_range
powerpc/64s/radix: Introduce local single page ceiling for TLB range
flush
powerpc/64s/radix: Improve TLB flushing for page table freeing
arch/powerpc/include/asm/mmu_context.h | 4 +
arch/powerpc/mm/mmu_context_book3s64.c | 25 ++-
arch/powerpc/mm/tlb-radix.c | 318 ++++++++++++++++++++++++---------
3 files changed, 256 insertions(+), 91 deletions(-)
--
2.15.0
^ permalink raw reply [flat|nested] 2+ messages in thread
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