Subject: Re: Looking for architecture papers

From: Segher Boessenkool <[email-masked]>
Date: Thu, 4 Oct 2018 03:46:16 -0500

On Thu, Oct 04, 2018 at 10:41:13AM +0300, Raz wrote:
> Frankly, the more I read the more perplexed I get. For example,
> according to BOOK III-S, chapter 3,
> the MSR bits are differ from the ones described in
> arch/powerpc/include/asm/reg.h.
> Bit zero, is LE, but in the book it is 64-bit mode.

LE is bit 63, the least significant bit, value 0x0000000000000001.
SF is bit 0, the most significant bit, value 0x8000000000000000.

Some people wrongly start counting at the end, calling the least
significant bit "bit 0".  That isn't its name.

Segher