Subject: [PATCH v2 0/5] Update hash MMU kernel mapping to be in sync with radix.

From: "Aneesh Kumar K.V" <[email-masked]>
Date: Sun, 17 Mar 2019 21:18:22 +0530

This patch series map all the kernel regions (vmalloc, IO and vmemmap) using
0xc top nibble address. This brings hash translation kernel mapping in sync with radix.
Each of these regions can now map 512TB. We use one context to map these
regions and hence the 512TB limit. We also update radix to use the same limit even though
we don't have context related restrictions there.

Aneesh Kumar K.V (5):
  powerpc/mm/hash64: Add a variable to track the end of IO mapping
  powerpc/mm/hash64: Map all the kernel regions in the same 0xc range
  powerpc/mm: Validate address values against different region limits
  powerpc/mm: Drop the unnecessary region check
  powerpc/mm/hash: Simplify the region id calculation.

 arch/powerpc/include/asm/book3s/64/hash-4k.h  | 15 +++
 arch/powerpc/include/asm/book3s/64/hash-64k.h | 12 +++
 arch/powerpc/include/asm/book3s/64/hash.h     | 97 ++++++++++++-------
 arch/powerpc/include/asm/book3s/64/mmu-hash.h | 31 +++---
 arch/powerpc/include/asm/book3s/64/pgtable.h  |  9 +-
 arch/powerpc/include/asm/book3s/64/radix.h    | 40 ++++----
 arch/powerpc/include/asm/page.h               | 11 ---
 arch/powerpc/kvm/book3s_hv_rm_xics.c          |  2 +-
 arch/powerpc/mm/copro_fault.c                 | 14 ++-
 arch/powerpc/mm/hash_utils_64.c               | 45 ++++++---
 arch/powerpc/mm/pgtable-hash64.c              | 13 ++-
 arch/powerpc/mm/pgtable-radix.c               | 20 +++-
 arch/powerpc/mm/pgtable_64.c                  |  9 +-
 arch/powerpc/mm/ptdump/hashpagetable.c        |  2 +-
 arch/powerpc/mm/ptdump/ptdump.c               |  3 +-
 arch/powerpc/mm/slb.c                         | 22 +++--
 arch/powerpc/platforms/cell/spu_base.c        |  4 +-
 drivers/misc/cxl/fault.c                      |  2 +-
 drivers/misc/ocxl/link.c                      |  2 +-
 19 files changed, 227 insertions(+), 126 deletions(-)

-- 
2.20.1