From: Nicholas Piggin <npiggin@gmail•com>
To: linuxppc-dev@lists•ozlabs.org
Cc: Nicholas Piggin <npiggin@gmail•com>
Subject: [PATCH v2 23/52] powerpc/64s/exception: fix indenting irregularities
Date: Thu, 20 Jun 2019 15:14:30 +1000 [thread overview]
Message-ID: <20190620051459.29573-24-npiggin@gmail.com> (raw)
In-Reply-To: <20190620051459.29573-1-npiggin@gmail.com>
Generally, macros that result in instructions being expanded are
indented by a tab, and those that don't have no indent. Fix the
obvious cases that go contrary to style.
No generated code change.
Signed-off-by: Nicholas Piggin <npiggin@gmail•com>
---
arch/powerpc/kernel/exceptions-64s.S | 92 ++++++++++++++--------------
1 file changed, 46 insertions(+), 46 deletions(-)
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index f7b6634bcc75..02b4722b7c64 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -261,16 +261,16 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
cmpwi r10,KVM_GUEST_MODE_SKIP
beq 89f
.else
- BEGIN_FTR_SECTION_NESTED(947)
+BEGIN_FTR_SECTION_NESTED(947)
ld r10,\area+EX_CFAR(r13)
std r10,HSTATE_CFAR(r13)
- END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947)
+END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947)
.endif
- BEGIN_FTR_SECTION_NESTED(948)
+BEGIN_FTR_SECTION_NESTED(948)
ld r10,\area+EX_PPR(r13)
std r10,HSTATE_PPR(r13)
- END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948)
+END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948)
ld r10,\area+EX_R10(r13)
std r12,HSTATE_SCRATCH0(r13)
sldi r12,r9,32
@@ -372,10 +372,10 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
std r9,GPR11(r1); \
std r10,GPR12(r1); \
std r11,GPR13(r1); \
- BEGIN_FTR_SECTION_NESTED(66); \
+BEGIN_FTR_SECTION_NESTED(66); \
ld r10,area+EX_CFAR(r13); \
std r10,ORIG_GPR3(r1); \
- END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \
+END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \
GET_CTR(r10, area); \
std r10,_CTR(r1);
@@ -794,7 +794,7 @@ EXC_REAL_BEGIN(system_reset, 0x100, 0x100)
* but we branch to the 0xc000... address so we can turn on relocation
* with mtmsr.
*/
- BEGIN_FTR_SECTION
+BEGIN_FTR_SECTION
mfspr r10,SPRN_SRR1
rlwinm. r10,r10,47-31,30,31
beq- 1f
@@ -803,7 +803,7 @@ EXC_REAL_BEGIN(system_reset, 0x100, 0x100)
bltlr cr1 /* no state loss, return to idle caller */
BRANCH_TO_C000(r10, system_reset_idle_common)
1:
- END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
+END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
#endif
KVMTEST EXC_STD 0x100
@@ -1151,10 +1151,10 @@ END_FTR_SECTION_IFCLR(CPU_FTR_HVMODE)
*
* Go back to nap/sleep/winkle mode again if (b) is true.
*/
- BEGIN_FTR_SECTION
+BEGIN_FTR_SECTION
rlwinm. r11,r12,47-31,30,31
bne machine_check_idle_common
- END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
+END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
#endif
/*
@@ -1261,13 +1261,13 @@ EXC_COMMON_BEGIN(mce_return)
b .
EXC_REAL_BEGIN(data_access, 0x300, 0x80)
-SET_SCRATCH0(r13) /* save r13 */
-EXCEPTION_PROLOG_0 PACA_EXGEN
+ SET_SCRATCH0(r13) /* save r13 */
+ EXCEPTION_PROLOG_0 PACA_EXGEN
b tramp_real_data_access
EXC_REAL_END(data_access, 0x300, 0x80)
TRAMP_REAL_BEGIN(tramp_real_data_access)
-EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 1, 0x300, 0
+ EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 1, 0x300, 0
/*
* DAR/DSISR must be read before setting MSR[RI], because
* a d-side MCE will clobber those registers so is not
@@ -1280,9 +1280,9 @@ EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 1, 0x300, 0
EXCEPTION_PROLOG_2_REAL data_access_common, EXC_STD, 1
EXC_VIRT_BEGIN(data_access, 0x4300, 0x80)
-SET_SCRATCH0(r13) /* save r13 */
-EXCEPTION_PROLOG_0 PACA_EXGEN
-EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 0, 0x300, 0
+ SET_SCRATCH0(r13) /* save r13 */
+ EXCEPTION_PROLOG_0 PACA_EXGEN
+ EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 0, 0x300, 0
mfspr r10,SPRN_DAR
mfspr r11,SPRN_DSISR
std r10,PACA_EXGEN+EX_DAR(r13)
@@ -1315,24 +1315,24 @@ ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX)
EXC_REAL_BEGIN(data_access_slb, 0x380, 0x80)
-SET_SCRATCH0(r13) /* save r13 */
-EXCEPTION_PROLOG_0 PACA_EXSLB
+ SET_SCRATCH0(r13) /* save r13 */
+ EXCEPTION_PROLOG_0 PACA_EXSLB
b tramp_real_data_access_slb
EXC_REAL_END(data_access_slb, 0x380, 0x80)
TRAMP_REAL_BEGIN(tramp_real_data_access_slb)
-EXCEPTION_PROLOG_1 EXC_STD, PACA_EXSLB, 1, 0x380, 0
+ EXCEPTION_PROLOG_1 EXC_STD, PACA_EXSLB, 1, 0x380, 0
mfspr r10,SPRN_DAR
std r10,PACA_EXSLB+EX_DAR(r13)
-EXCEPTION_PROLOG_2_REAL data_access_slb_common, EXC_STD, 1
+ EXCEPTION_PROLOG_2_REAL data_access_slb_common, EXC_STD, 1
EXC_VIRT_BEGIN(data_access_slb, 0x4380, 0x80)
-SET_SCRATCH0(r13) /* save r13 */
-EXCEPTION_PROLOG_0 PACA_EXSLB
-EXCEPTION_PROLOG_1 EXC_STD, PACA_EXSLB, 0, 0x380, 0
+ SET_SCRATCH0(r13) /* save r13 */
+ EXCEPTION_PROLOG_0 PACA_EXSLB
+ EXCEPTION_PROLOG_1 EXC_STD, PACA_EXSLB, 0, 0x380, 0
mfspr r10,SPRN_DAR
std r10,PACA_EXSLB+EX_DAR(r13)
-EXCEPTION_PROLOG_2_VIRT data_access_slb_common, EXC_STD
+ EXCEPTION_PROLOG_2_VIRT data_access_slb_common, EXC_STD
EXC_VIRT_END(data_access_slb, 0x4380, 0x80)
TRAMP_KVM_SKIP(PACA_EXSLB, 0x380)
@@ -1415,25 +1415,25 @@ ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX)
EXC_REAL_BEGIN(hardware_interrupt, 0x500, 0x100)
SET_SCRATCH0(r13) /* save r13 */
EXCEPTION_PROLOG_0 PACA_EXGEN
- BEGIN_FTR_SECTION
- EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, 0x500, IRQS_DISABLED
- EXCEPTION_PROLOG_2_REAL hardware_interrupt_common, EXC_HV, 1
- FTR_SECTION_ELSE
- EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 1, 0x500, IRQS_DISABLED
- EXCEPTION_PROLOG_2_REAL hardware_interrupt_common, EXC_STD, 1
- ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
+BEGIN_FTR_SECTION
+ EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, 0x500, IRQS_DISABLED
+ EXCEPTION_PROLOG_2_REAL hardware_interrupt_common, EXC_HV, 1
+FTR_SECTION_ELSE
+ EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 1, 0x500, IRQS_DISABLED
+ EXCEPTION_PROLOG_2_REAL hardware_interrupt_common, EXC_STD, 1
+ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
EXC_REAL_END(hardware_interrupt, 0x500, 0x100)
EXC_VIRT_BEGIN(hardware_interrupt, 0x4500, 0x100)
SET_SCRATCH0(r13) /* save r13 */
EXCEPTION_PROLOG_0 PACA_EXGEN
- BEGIN_FTR_SECTION
- EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, 0x500, IRQS_DISABLED
- EXCEPTION_PROLOG_2_VIRT hardware_interrupt_common, EXC_HV
- FTR_SECTION_ELSE
- EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 1, 0x500, IRQS_DISABLED
- EXCEPTION_PROLOG_2_VIRT hardware_interrupt_common, EXC_STD
- ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
+BEGIN_FTR_SECTION
+ EXCEPTION_PROLOG_1 EXC_HV, PACA_EXGEN, 1, 0x500, IRQS_DISABLED
+ EXCEPTION_PROLOG_2_VIRT hardware_interrupt_common, EXC_HV
+FTR_SECTION_ELSE
+ EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 1, 0x500, IRQS_DISABLED
+ EXCEPTION_PROLOG_2_VIRT hardware_interrupt_common, EXC_STD
+ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
EXC_VIRT_END(hardware_interrupt, 0x4500, 0x100)
TRAMP_KVM(PACA_EXGEN, 0x500)
@@ -1442,25 +1442,25 @@ EXC_COMMON_ASYNC(hardware_interrupt_common, 0x500, do_IRQ)
EXC_REAL_BEGIN(alignment, 0x600, 0x100)
-SET_SCRATCH0(r13) /* save r13 */
-EXCEPTION_PROLOG_0 PACA_EXGEN
-EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 1, 0x600, 0
+ SET_SCRATCH0(r13) /* save r13 */
+ EXCEPTION_PROLOG_0 PACA_EXGEN
+ EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 1, 0x600, 0
mfspr r10,SPRN_DAR
mfspr r11,SPRN_DSISR
std r10,PACA_EXGEN+EX_DAR(r13)
stw r11,PACA_EXGEN+EX_DSISR(r13)
-EXCEPTION_PROLOG_2_REAL alignment_common, EXC_STD, 1
+ EXCEPTION_PROLOG_2_REAL alignment_common, EXC_STD, 1
EXC_REAL_END(alignment, 0x600, 0x100)
EXC_VIRT_BEGIN(alignment, 0x4600, 0x100)
-SET_SCRATCH0(r13) /* save r13 */
-EXCEPTION_PROLOG_0 PACA_EXGEN
-EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 0, 0x600, 0
+ SET_SCRATCH0(r13) /* save r13 */
+ EXCEPTION_PROLOG_0 PACA_EXGEN
+ EXCEPTION_PROLOG_1 EXC_STD, PACA_EXGEN, 0, 0x600, 0
mfspr r10,SPRN_DAR
mfspr r11,SPRN_DSISR
std r10,PACA_EXGEN+EX_DAR(r13)
stw r11,PACA_EXGEN+EX_DSISR(r13)
-EXCEPTION_PROLOG_2_VIRT alignment_common, EXC_STD
+ EXCEPTION_PROLOG_2_VIRT alignment_common, EXC_STD
EXC_VIRT_END(alignment, 0x4600, 0x100)
TRAMP_KVM(PACA_EXGEN, 0x600)
--
2.20.1
next prev parent reply other threads:[~2019-06-20 6:03 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-20 5:14 [PATCH v2 00/52] powerpc/64s interrupt handler cleanups, gasification Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 01/52] powerpc/64s/exception: fix line wrap and semicolon inconsistencies in macros Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 02/52] powerpc/64s/exception: remove H concatenation for EXC_HV variants Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 03/52] powerpc/64s/exception: consolidate EXCEPTION_PROLOG_2 with _NORI variant Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 04/52] powerpc/64s/exception: move and tidy EXCEPTION_PROLOG_2 variants Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 05/52] powerpc/64s/exception: fix sreset KVM test code Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 06/52] powerpc/64s/exception: remove the "extra" macro parameter Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 07/52] powerpc/64s/exception: consolidate maskable and non-maskable prologs Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 08/52] powerpc/64s/exception: merge KVM handler and skip variants Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 09/52] powerpc/64s/exception: KVM handler can set the HSRR trap bit Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 10/52] powerpc/64s/exception: Make EXCEPTION_PROLOG_0 a gas macro for consistency with others Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 11/52] powerpc/64s/exception: Move EXCEPTION_COMMON handler and return branches into callers Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 12/52] powerpc/64s/exception: Move EXCEPTION_COMMON additions " Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 13/52] powerpc/64s/exception: unwind exception-64s.h macros Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 14/52] powerpc/64s/exception: improve 0x500 handler code Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 15/52] powerpc/64s/exception: move EXCEPTION_PROLOG_2* to a more logical place Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 16/52] powerpc/64s/exception: remove STD_EXCEPTION_COMMON variants Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 17/52] powerpc/64s/exception: move KVM related code together Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 18/52] powerpc/64s/exception: move exception-64s.h code to exception-64s.S where it is used Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 19/52] powerpc/64s/exception: move head-64.h " Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 20/52] powerpc/64s/exception: remove __BRANCH_TO_KVM Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 21/52] powerpc/64s/exception: remove unused BRANCH_TO_COMMON Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 22/52] powerpc/64s/exception: use a gas macro for system call handler code Nicholas Piggin
2019-06-20 5:14 ` Nicholas Piggin [this message]
2019-06-20 5:14 ` [PATCH v2 24/52] powerpc/64s/exception: generate regs clear instructions using .rept Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 25/52] powerpc/64s/exception: remove bad stack branch Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 26/52] powerpc/64s/exception: remove pointless EXCEPTION_PROLOG macro indirection Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 27/52] powerpc/64s/exception: move paca save area offsets into exception-64s.S Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 28/52] powerpc/64s/exception: clean up system call entry Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 29/52] powerpc/64s/exception: avoid SPR RAW scoreboard stall in real mode entry Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 30/52] powerpc/64s/exception: optimise system_reset for idle, clean up non-idle case Nicholas Piggin
2019-06-20 5:41 ` Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 31/52] powerpc/64s/exception: mtmsrd L=1 cleanup Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 32/52] powerpc/64s/exception: windup use r9 consistently to restore SPRs Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 33/52] powerpc/64s/exception: move machine check windup in_mce handling Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 34/52] powerpc/64s/exception: simplify hmi windup code Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 35/52] powerpc/64s/exception: shuffle windup code around Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 36/52] powerpc/64s/exception: use common macro for windup Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 37/52] powerpc/64s/exception: add dar and dsisr options to exception macro Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 38/52] powerpc/64s/exception: machine check use standard macros to save dar/dsisr Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 39/52] powerpc/64s/exception: denorm handler use standard scratch save macro Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 40/52] powerpc/64s/exception: move SET_SCRATCH0 into EXCEPTION_PROLOG_0 Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 41/52] powerpc/tm: update comment about interrupt re-entrancy Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 42/52] powerpc/64s/exception: machine check fwnmi does not trigger when in HV mode Nicholas Piggin
2019-06-20 9:26 ` Mahesh Jagannath Salgaonkar
2019-06-20 9:50 ` Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 43/52] powerpc/64s/exception: machine check early only runs " Nicholas Piggin
2019-06-20 9:53 ` Mahesh J Salgaonkar
2019-06-20 10:16 ` Nicholas Piggin
2019-06-20 10:57 ` Mahesh Jagannath Salgaonkar
2019-06-20 5:14 ` [PATCH v2 44/52] powerpc/64s/exception: separate pseries and powernv mce delivery paths Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 45/52] powerpc/64s/exception: machine check windup restore cfar for host delivery Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 46/52] powerpc/64s/exception: fix machine check early should not set AMR Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 47/52] powerpc/64s/exception: machine check restructure handler to be more regular Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 48/52] powerpc/64s/exception: simplify machine check early path Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 49/52] powerpc/64s/exceptions: machine check move unrecoverable handling out of line Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 50/52] powerpc/64s/exception: untangle early machine check handler Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 51/52] powerpc/64s/exception: machine check improve branch labels Nicholas Piggin
2019-06-20 5:14 ` [PATCH v2 52/52] powerpc/64s/exception: add missing branch to self after RFI Nicholas Piggin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190620051459.29573-24-npiggin@gmail.com \
--to=npiggin@gmail$(echo .)com \
--cc=linuxppc-dev@lists$(echo .)ozlabs.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox