Subject: [PATCH] arch/powerpc/64: Avoid isync in flush_dcache_range

From: "Aneesh Kumar K.V" <[email-masked]>
Date: Fri, 20 Mar 2020 16:02:42 +0530

As per ISA and isync is only needed on instruction cache
block invalidate. Remove the same from dcache invalidate.

Signed-off-by: Aneesh Kumar K.V <[email-masked]>
---
Note: IIUC we can also void the sync fore dcbf.

 arch/powerpc/include/asm/cacheflush.h | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/arch/powerpc/include/asm/cacheflush.h b/arch/powerpc/include/asm/cacheflush.h
index 4a1c9f0200e1..e92191b390f3 100644
--- a/arch/powerpc/include/asm/cacheflush.h
+++ b/arch/powerpc/include/asm/cacheflush.h
@@ -65,17 +65,13 @@ static inline void flush_dcache_range(unsigned long start, unsigned long stop)
 	unsigned long size = stop - (unsigned long)addr + (bytes - 1);
 	unsigned long i;
 
-	if (IS_ENABLED(CONFIG_PPC64)) {
+	if (IS_ENABLED(CONFIG_PPC64))
 		mb();	/* sync */
-		isync();
-	}
 
 	for (i = 0; i < size >> shift; i++, addr += bytes)
 		dcbf(addr);
 	mb();	/* sync */
 
-	if (IS_ENABLED(CONFIG_PPC64))
-		isync();
 }
 
 /*
-- 
2.25.1