From: Kajol Jain <kjain@linux•ibm.com>
To: mpe@ellerman•id.au
Cc: kjain@linux•ibm.com, atrajeev@linux•vnet.ibm.com,
maddy@linux•vnet.ibm.com, linuxppc-dev@lists•ozlabs.org,
rnsastry@linux•ibm.com
Subject: [PATCH 07/20] selftest/powerpc/pmu: Add macro to extract mmcr0/mmcr1 fields
Date: Thu, 27 Jan 2022 12:49:59 +0530 [thread overview]
Message-ID: <20220127072012.662451-8-kjain@linux.ibm.com> (raw)
In-Reply-To: <20220127072012.662451-1-kjain@linux.ibm.com>
From: Athira Rajeev <atrajeev@linux•vnet.ibm.com>
Add macro and utility functions to fetch individual
fields from Monitor Mode Control Register 0(MMCR0) and
Monitor Mode Control Register 1(MMCR1) PMU register.
Signed-off-by: Athira Rajeev <atrajeev@linux•vnet.ibm.com>
---
.../powerpc/pmu/sampling_tests/misc.h | 66 +++++++++++++++++++
1 file changed, 66 insertions(+)
diff --git a/tools/testing/selftests/powerpc/pmu/sampling_tests/misc.h b/tools/testing/selftests/powerpc/pmu/sampling_tests/misc.h
index 0f5446b56463..fea029506aa3 100644
--- a/tools/testing/selftests/powerpc/pmu/sampling_tests/misc.h
+++ b/tools/testing/selftests/powerpc/pmu/sampling_tests/misc.h
@@ -12,6 +12,10 @@
#define PERF_POWER9_MASK 0x7f8ffffffffffff
#define PERF_POWER10_MASK 0x7ffffffffffffff
+#define MMCR0_FC56 0x00000010UL /* freeze counters 5 and 6 */
+#define MMCR0_PMCCEXT 0x00000200UL /* PMCCEXT control */
+#define MMCR1_RSQ 0x200000000000ULL /* radix scope qual field */
+
extern int ev_mask_pmcxsel, ev_shift_pmcxsel;
extern int ev_mask_marked, ev_shift_marked;
extern int ev_mask_comb, ev_shift_comb;
@@ -62,6 +66,66 @@ int collect_samples(void *sample_buff);
u64 *get_intr_regs(struct event *event, void *sample_buff);
u64 get_reg_value(u64 *intr_regs, char *register_name);
+static inline int get_mmcr0_fc56(u64 mmcr0, int pmc)
+{
+ return (mmcr0 & MMCR0_FC56);
+}
+
+static inline int get_mmcr0_pmccext(u64 mmcr0, int pmc)
+{
+ return (mmcr0 & MMCR0_PMCCEXT);
+}
+
+static inline int get_mmcr0_pmao(u64 mmcr0, int pmc)
+{
+ return ((mmcr0 >> 7) & 0x1);
+}
+
+static inline int get_mmcr0_cc56run(u64 mmcr0, int pmc)
+{
+ return ((mmcr0 >> 8) & 0x1);
+}
+
+static inline int get_mmcr0_pmcjce(u64 mmcr0, int pmc)
+{
+ return ((mmcr0 >> 14) & 0x1);
+}
+
+static inline int get_mmcr0_pmc1ce(u64 mmcr0, int pmc)
+{
+ return ((mmcr0 >> 15) & 0x1);
+}
+
+static inline int get_mmcr0_pmae(u64 mmcr0, int pmc)
+{
+ return ((mmcr0 >> 27) & 0x1);
+}
+
+static inline int get_mmcr1_pmcxsel(u64 mmcr1, int pmc)
+{
+ return ((mmcr1 >> ((24 - (((pmc) - 1) * 8))) & 0xff));
+}
+
+static inline int get_mmcr1_unit(u64 mmcr1, int pmc)
+{
+ return ((mmcr1 >> ((60 - (4 * ((pmc) - 1))))) & 0xf);
+}
+
+static inline int get_mmcr1_comb(u64 mmcr1, int pmc)
+{
+ return ((mmcr1 >> (38 - ((pmc - 1) * 2))) & 0x3);
+}
+
+static inline int get_mmcr1_cache(u64 mmcr1, int pmc)
+{
+ return ((mmcr1 >> 46) & 0x3);
+}
+
+static inline int get_mmcr1_rsq(u64 mmcr1, int pmc)
+{
+ return mmcr1 & MMCR1_RSQ;
+}
+
static inline int get_mmcr2_fcs(u64 mmcr2, int pmc)
{
return ((mmcr2 & (1ull << (63 - (((pmc) - 1) * 9)))) >> (63 - (((pmc) - 1) * 9)));
@@ -114,6 +178,8 @@ static inline int get_mmcr2_l2l3(u64 mmcr2, int pmc)
return 0;
}
+#define GET_MMCR0(a, b, c) get_mmcr0_##c(a, b)
+#define GET_MMCR1(a, b, c) get_mmcr1_##c(a, b)
#define GET_MMCR2(a, b, c) get_mmcr2_##c(a, b)
/*
--
2.27.0
next prev parent reply other threads:[~2022-01-27 7:26 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-27 7:19 [PATCH 00/20] Add perf sampling tests as part of selftest Kajol Jain
2022-01-27 7:19 ` [PATCH 01/20] selftest/powerpc/pmu: Include mmap_buffer field as part of struct event Kajol Jain
2022-01-27 7:19 ` [PATCH 02/20] selftest/powerpc/pmu: Add support for perf sampling tests Kajol Jain
2022-01-27 7:19 ` [PATCH 03/20] selftest/powerpc/pmu: Add macros to parse event codes Kajol Jain
2022-01-27 7:19 ` [PATCH 04/20] selftest/powerpc/pmu: Add utility functions to post process the mmap buffer Kajol Jain
2022-01-27 7:19 ` [PATCH 05/20] selftest/powerpc/pmu: Add event_init_sampling function Kajol Jain
2022-01-27 7:19 ` [PATCH 06/20] selftest/powerpc/pmu: Add macros to extract mmcr fields Kajol Jain
2022-01-27 7:19 ` Kajol Jain [this message]
2022-01-27 7:20 ` [PATCH 08/20] selftest/powerpc/pmu: Add macro to extract mmcr3 and mmcra fields Kajol Jain
2022-01-27 7:20 ` [PATCH 09/20] selftest/powerpc/pmu/: Add interface test for mmcr0 exception bits Kajol Jain
2022-01-27 7:20 ` [PATCH 10/20] selftest/powerpc/pmu/: Add interface test for mmcr0_cc56run field Kajol Jain
2022-01-27 7:20 ` [PATCH 11/20] selftest/powerpc/pmu/: Add interface test for mmcr0_pmccext bit Kajol Jain
2022-01-27 7:20 ` [PATCH 12/20] selftest/powerpc/pmu/: Add interface test for mmcr0_pmcjce field Kajol Jain
2022-01-27 7:20 ` [PATCH 13/20] selftest/powerpc/pmu/: Add interface test for mmcr0_fc56 field using pmc1 Kajol Jain
2022-01-27 7:20 ` [PATCH 14/20] selftest/powerpc/pmu/: Add interface test for mmcr0_pmc56 using pmc5 Kajol Jain
2022-01-27 7:20 ` [PATCH 15/20] selftest/powerpc/pmu/: Add interface test for mmcr1_comb field Kajol Jain
2022-01-27 7:20 ` [PATCH 16/20] selftest/powerpc/pmu/: Add selftest for mmcr1 pmcxsel/unit/cache fields Kajol Jain
2022-03-10 7:49 ` Christophe Leroy
2022-03-10 12:11 ` Michael Ellerman
2022-03-10 12:29 ` kajoljain
2022-01-27 7:20 ` [PATCH 17/20] selftest/powerpc/pmu/: Add interface test for mmcr2_l2l3 field Kajol Jain
2022-01-27 7:20 ` [PATCH 18/20] selftest/powerpc/pmu/: Add interface test for mmcr2_fcs_fch fields Kajol Jain
2022-01-27 7:20 ` [PATCH 19/20] selftest/powerpc/pmu/: Add interface test for mmcr3_src fields Kajol Jain
2022-01-27 7:20 ` [PATCH 20/20] selftest/powerpc/pmu: Add interface test for mmcra register fields Kajol Jain
2022-03-02 12:41 ` [PATCH 00/20] Add perf sampling tests as part of selftest Michael Ellerman
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