From: Jonathan Cameron <jonathan.cameron@huawei•com>
To: "Fabio M. De Francesco" <fabio.m.de.francesco@linux•intel.com>
Cc: linux-cxl@vger•kernel.org,
"Rafael J . Wysocki" <rafael@kernel•org>,
"Len Brown" <lenb@kernel•org>, "Tony Luck" <tony.luck@intel•com>,
"Borislav Petkov" <bp@alien8•de>,
"Hanjun Guo" <guohanjun@huawei•com>,
"Mauro Carvalho Chehab" <mchehab@kernel•org>,
"Shuai Xue" <xueshuai@linux•alibaba.com>,
"Davidlohr Bueso" <dave@stgolabs•net>,
"Dave Jiang" <dave.jiang@intel•com>,
"Alison Schofield" <alison.schofield@intel•com>,
"Vishal Verma" <vishal.l.verma@intel•com>,
"Ira Weiny" <ira.weiny@intel•com>,
"Dan Williams" <dan.j.williams@intel•com>,
"Mahesh J Salgaonkar" <mahesh@linux•ibm.com>,
"Oliver O'Halloran" <oohall@gmail•com>,
"Bjorn Helgaas" <bhelgaas@google•com>,
"Sunil V L" <sunilvl@ventanamicro•com>,
"Xiaofei Tan" <tanxiaofei@huawei•com>,
"Mario Limonciello" <mario.limonciello@amd•com>,
"Huacai Chen" <chenhuacai@kernel•org>,
"Heinrich Schuchardt" <heinrich.schuchardt@canonical•com>,
"Arnd Bergmann" <arnd@arndb•de>,
"Peter Zijlstra" <peterz@infradead•org>,
"Ingo Molnar" <mingo@kernel•org>,
"Guo Weikang" <guoweikang.kernel@gmail•com>,
"Xin Li" <xin@zytor•com>, "Will Deacon" <will@kernel•org>,
"Huang Yiwei" <quic_hyiwei@quicinc•com>,
"Gavin Shan" <gshan@redhat•com>,
"Smita Koralahalli" <Smita.KoralahalliChannabasappa@amd•com>,
"Uwe Kleine-König" <u.kleine-koenig@baylibre•com>,
"Li Ming" <ming.li@zohomail•com>,
"Ilpo Järvinen" <ilpo.jarvinen@linux•intel.com>,
"Kuppuswamy Sathyanarayanan"
<sathyanarayanan.kuppuswamy@linux•intel.com>,
"Karolina Stolarek" <karolina.stolarek@oracle•com>,
"Jon Pan-Doh" <pandoh@google•com>,
"Lukas Wunner" <lukas@wunner•de>,
"Shiju Jose" <shiju.jose@huawei•com>,
linux-kernel@vger•kernel.org, linux-acpi@vger•kernel.org,
linuxppc-dev@lists•ozlabs.org, linux-pci@vger•kernel.org
Subject: Re: [PATCH 6/6 v6] ACPI: extlog: Trace CPER CXL Protocol Error Section
Date: Tue, 28 Oct 2025 15:06:09 +0000 [thread overview]
Message-ID: <20251028150609.000023bf@huawei.com> (raw)
In-Reply-To: <20251023122612.1326748-7-fabio.m.de.francesco@linux.intel.com>
On Thu, 23 Oct 2025 14:25:41 +0200
"Fabio M. De Francesco" <fabio.m.de.francesco@linux•intel.com> wrote:
> When Firmware First is enabled, BIOS handles errors first and then it makes
> them available to the kernel via the Common Platform Error Record (CPER)
> sections (UEFI 2.10 Appendix N). Linux parses the CPER sections via one of
> two similar paths, either ELOG or GHES. The errors managed by ELOG are
> signaled to the BIOS by the I/O Machine Check Architecture (I/O MCA).
>
> Currently, ELOG and GHES show some inconsistencies in how they report to
> userspace via trace events.
>
> Therefore, make the two mentioned paths act similarly by tracing the CPER
> CXL Protocol Error Section (UEFI v2.10, Appendix N.2.13).
>
> Cc: Dan Williams <dan.j.williams@intel•com>
> Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux•intel.com>
> Signed-off-by: Fabio M. De Francesco <fabio.m.de.francesco@linux•intel.com>
Just one small question. With that addressed,
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei•com>
> diff --git a/drivers/cxl/core/ras.c b/drivers/cxl/core/ras.c
> index 2731ba3a0799..3f527b0c6509 100644
> --- a/drivers/cxl/core/ras.c
> +++ b/drivers/cxl/core/ras.c
> @@ -105,6 +105,12 @@ static void cxl_cper_handle_prot_err(struct cxl_cper_prot_err_work_data *data)
> cxl_cper_trace_uncorr_prot_err(cxlmd, data->ras_cap);
> }
>
> +void cxl_cper_ras_handle_prot_err(struct cxl_cper_prot_err_work_data *wd)
Why do we need this wrapper? The name is a bit more general, so if you
do need it, then why not instead just rename cxl_cper_handle_prot_err()
> +{
> + cxl_cper_handle_prot_err(wd);
> +}
> +EXPORT_SYMBOL_GPL(cxl_cper_ras_handle_prot_err);
> +
> static void cxl_cper_prot_err_work_fn(struct work_struct *work)
> {
> struct cxl_cper_prot_err_work_data wd;
> diff --git a/include/cxl/event.h b/include/cxl/event.h
> index 94081aec597a..a37eef112411 100644
> --- a/include/cxl/event.h
> +++ b/include/cxl/event.h
> @@ -340,4 +340,6 @@ cxl_cper_setup_prot_err_work_data(struct cxl_cper_prot_err_work_data *wd,
> }
> #endif
>
> +void cxl_cper_ras_handle_prot_err(struct cxl_cper_prot_err_work_data *wd);
> +
> #endif /* _LINUX_CXL_EVENT_H */
next prev parent reply other threads:[~2025-10-28 15:06 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-23 12:25 [PATCH 0/6 v6] Make ELOG and GHES log and trace consistently Fabio M. De Francesco
2025-10-23 12:25 ` [PATCH 1/6 v6] ACPI: extlog: Trace CPER Non-standard Section Body Fabio M. De Francesco
2025-10-28 16:19 ` Kuppuswamy Sathyanarayanan
2025-10-23 12:25 ` [PATCH 2/6 v6] ACPI: extlog: Trace CPER PCI Express Error Section Fabio M. De Francesco
2025-10-28 14:48 ` Jonathan Cameron
2025-10-31 10:18 ` Fabio M. De Francesco
2025-10-23 12:25 ` [PATCH 3/6 v6] acpi/ghes: Make GHES select ACPI_APEI_PCIEAER Fabio M. De Francesco
2025-10-23 12:25 ` [PATCH 4/6 v6] acpi/ghes: Add helper for CXL protocol errors checks Fabio M. De Francesco
2025-10-28 14:54 ` Jonathan Cameron
2025-11-04 17:41 ` Fabio M. De Francesco
2025-10-23 12:25 ` [PATCH 5/6 v6] acpi/ghes: Add helper to copy CXL protocol error info to work struct Fabio M. De Francesco
2025-10-28 14:59 ` Jonathan Cameron
2025-10-23 12:25 ` [PATCH 6/6 v6] ACPI: extlog: Trace CPER CXL Protocol Error Section Fabio M. De Francesco
2025-10-28 15:06 ` Jonathan Cameron [this message]
2025-11-04 16:53 ` Fabio M. De Francesco
2025-10-27 19:40 ` [PATCH 0/6 v6] Make ELOG and GHES log and trace consistently Rafael J. Wysocki
2025-10-27 20:15 ` Luck, Tony
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