Subject: Re: linux-2.4.18 & copy-back cache mode

From: Conn Clark <[email-masked]>
Date: Fri, 08 Mar 2002 17:19:30 -0800

Navin Boppuri wrote:
>
> I am sorry. I meant 64Mhz , not 66Mhz.
>
> Navin.
>
> -----Original Message-----
> From: Navin Boppuri
> Sent: Thursday, March 07, 2002 2:33 PM
> To: [email-masked]
> Cc: [email-masked]
> Subject: RE: linux-2.4.18 & copy-back cache mode
>
> I am running my MPC855T at 66Mhz 1:1 CPU/bus clock mode without any problems. I used an app. note from Motorola to do this and according to the app.note, we just need to satisfy some timing constraints on the processor (latency of data reaching the MPC pins from SDRAM). The app. note suggests using specific Micron SDRAM which satisfy all these requirements.
>
> Navin.

Which app note was this? Does any body know if it will work on an
MPC850?

Thanks,

	Conn
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Conn Clark
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