Subject: Re: [11/41] powerpc/dart: Use a cachable DART

From: Michael Ellerman <[email-masked]>
Date: Thu, 21 Jul 2016 21:09:35 +1000 (AEST)

On Tue, 2016-05-07 at 05:03:47 UTC, Benjamin Herrenschmidt wrote:
> Instead of punching a hole in the linear mapping, just use normal
> cachable memory, and apply the flush sequence documented in the
> CPC625 (aka U3) user manual.
> 
> This allows us to remove quite a bit of code related to the early
> allocation of the DART and the hole in the linear mapping. We can
> also get rid of the copy of the DART for suspend/resume as the
> original memory can just be saved/restored now, as long as we
> properly sync the caches.
> 
> Signed-off-by: Benjamin Herrenschmidt <[email-masked]>

Applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/c40785ad305b32e9b0b5fbc888

cheers