From: Michael Ellerman <patch-notifications@ellerman•id.au>
To: Nicholas Piggin <npiggin@gmail•com>, linuxppc-dev@lists•ozlabs.org
Cc: "Aneesh Kumar K . V" <aneesh.kumar@linux•vnet.ibm.com>,
Nicholas Piggin <npiggin@gmail•com>
Subject: Re: [v2,3/7] powerpc/64s/radix: optimize TLB range flush barriers
Date: Tue, 14 Nov 2017 22:12:10 +1100 (AEDT) [thread overview]
Message-ID: <3yblG26llnz9sRg@ozlabs.org> (raw)
In-Reply-To: <20171107075309.20500-4-npiggin@gmail.com>
On Tue, 2017-11-07 at 07:53:05 UTC, Nicholas Piggin wrote:
> Short range flushes issue a sequences of tlbie(l) instructions for
> individual effective addresses. These do not all require individual
> barrier sequences, only one covering all tlbie(l) instructions.
>
> Commit f7327e0ba3 ("powerpc/mm/radix: Remove unnecessary ptesync")
> made a similar optimization for tlbiel for PID flushing.
>
> For tlbie, the ISA says:
>
> The tlbsync instruction provides an ordering function for the
> effects of all tlbie instructions executed by the thread executing
> the tlbsync instruction, with respect to the memory barrier
> created by a subsequent ptesync instruction executed by the same
> thread.
>
> Time to munmap 30 pages of memory (after mmap, touch):
> local global
> vanilla 10.9us 22.3us
> patched 3.4us 14.4us
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail•com>
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/14001c60939a754717893672209160
cheers
next prev parent reply other threads:[~2017-11-14 11:12 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-07 7:53 [PATCH v2 0/7] powerpc/64s/radix TLB flush fixes and performance improvements Nicholas Piggin
2017-11-07 7:53 ` [PATCH v2 1/7] powerpc/64s/radix: tlbie improve preempt handling Nicholas Piggin
2017-11-07 7:53 ` [PATCH v2 2/7] powerpc/64s/radix: Fix process table entry cache invalidation Nicholas Piggin
2017-11-07 7:53 ` [PATCH v2 3/7] powerpc/64s/radix: optimize TLB range flush barriers Nicholas Piggin
2017-11-14 11:12 ` Michael Ellerman [this message]
2017-11-07 7:53 ` [PATCH v2 4/7] powerpc/64s/radix: Implement _tlbie(l)_va_range flush functions Nicholas Piggin
2017-11-14 11:12 ` [v2, " Michael Ellerman
2017-11-07 7:53 ` [PATCH v2 5/7] powerpc/64s/radix: Optimize flush_tlb_range Nicholas Piggin
2017-11-14 11:12 ` [v2,5/7] " Michael Ellerman
2017-11-07 7:53 ` [PATCH v2 6/7] powerpc/64s/radix: Introduce local single page ceiling for TLB range flush Nicholas Piggin
2017-11-14 11:12 ` [v2, " Michael Ellerman
2017-11-07 7:53 ` [PATCH v2 7/7] powerpc/64s/radix: Improve TLB flushing for page table freeing Nicholas Piggin
2017-11-14 11:12 ` [v2, " Michael Ellerman
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