From: Chris Friesen <cfriesen@nortel•com>
To: linuxppc-dev@ozlabs•org
Subject: question on inline assembly and long long values
Date: Wed, 06 Apr 2005 12:26:07 -0600 [thread overview]
Message-ID: <425429BF.1050706@nortel.com> (raw)
I want to retrieve the msr (which is 64-bits) on a 970 when running in
32-bit mode. I have the following bit of code that seems to work, but
when looking at the code it always seems to use a suboptimal register
for the low word, and then it ends up having to copy it to the right
register to create a long long register pair.
static inline unsigned long long get_msr()
{
union {
struct {
unsigned long low;
unsigned long high;
} words;
unsigned long long val;
} val;
asm volatile( \
"mfmsr %0 \n\t" \
"rldicl %1,%0,32,32 \n\t" \
"rldicl %0,%0,0,32 \n\t" \
: "=r" (val.words.low), "=r" (val.words.high));
return val.val;
}
Using this code, the optimised assembly output of
unsigned long long a = asdf();
unsigned long long b = asdf();
is
mfmsr 5
rldicl 0,5,32,32
rldicl 5,5,0,32
mr 6,0
mfmsr 7
rldicl 9,7,32,32
rldicl 7,7,0,32
mr 8,9
I figure it should have been able to use registers 6/8 in the first
place, and save the extra moves.
Is there any way to help gcc optimise this?
Chris
next reply other threads:[~2005-04-06 18:26 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-04-06 18:26 Chris Friesen [this message]
2005-04-06 19:16 ` question on inline assembly and long long values Kumar Gala
2005-04-06 20:01 ` Chris Friesen
2005-04-06 21:18 ` Gabriel Paubert
2005-04-06 21:37 ` Chris Friesen
2005-04-06 23:19 ` Benjamin Herrenschmidt
2005-04-06 23:30 ` Chris Friesen
2005-04-06 23:49 ` Benjamin Herrenschmidt
2005-04-06 23:56 ` Chris Friesen
2005-04-06 23:57 ` Benjamin Herrenschmidt
2005-04-07 0:09 ` Chris Friesen
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