From: Michael Ellerman <patch-notifications@ellerman•id.au>
To: Sandipan Das <sandipan@linux•ibm.com>
Cc: naveen.n.rao@linux•ibm.com, linuxppc-dev@lists•ozlabs.org,
dja@axtens•net, paulus@samba•org, ravi.bangoria@linux•ibm.com
Subject: Re: [1/3] powerpc: sstep: Add tests for compute type instructions
Date: Tue, 26 Feb 2019 14:27:50 +1100 (AEDT) [thread overview]
Message-ID: <447klq0ZV7z9s9L@ozlabs.org> (raw)
In-Reply-To: <df7e1d69a6ac2ec3db8bb5481431d8ad8a28157a.1550645549.git.sandipan@linux.ibm.com>
On Wed, 2019-02-20 at 06:56:58 UTC, Sandipan Das wrote:
> This enhances the current selftest framework for validating
> the in-kernel instruction emulation infrastructure by adding
> support for compute type instructions i.e. integer ALU-based
> instructions. Originally, this framework was limited to only
> testing load and store instructions.
>
> While most of the GPRs can be validated, support for SPRs is
> limited to LR, CR and XER for now.
>
> When writing the test cases, one must ensure that the Stack
> Pointer (GPR1) or the Thread Pointer (GPR13) are not touched
> by any means as these are vital non-volatile registers.
>
> Signed-off-by: Sandipan Das <sandipan@linux•ibm.com>
Series applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/84022ac17327c5383917f46c162fd943
cheers
next prev parent reply other threads:[~2019-02-26 3:34 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-20 6:56 [PATCH 0/3] powerpc: sstep: Emulation test infrastructure Sandipan Das
2019-02-20 6:56 ` [PATCH 1/3] powerpc: sstep: Add tests for compute type instructions Sandipan Das
2019-02-21 11:13 ` Michael Ellerman
2019-02-22 6:49 ` Sandipan Das
2019-02-26 3:27 ` Michael Ellerman [this message]
2019-02-20 6:56 ` [PATCH 2/3] powerpc: sstep: Add tests for add[.] instruction Sandipan Das
2019-02-20 6:57 ` [PATCH 3/3] powerpc: sstep: Add tests for addc[.] instruction Sandipan Das
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