Subject: Re: [PATCH 5/10 v2] Add 8641 CPU and i8259 Setup

From: Xianghua Xiao <[email-masked]>
Date: Fri, 09 Jun 2006 12:16:17 -0500

Jon Loeliger wrote:

>So, like, the other day Benjamin Herrenschmidt mumbled:
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>>[A bunch of SMP issues.]
>>
>>The above is wrong, it prevents using the same kernel image on another
>>platform.
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>>Same comment above... #ifdef is bad. You are entering from 0x100 with
>>address translation not disabled ?
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>>>+	bl	clear_bats
>>> 	bl	load_up_mmu
>>>      
>>>
>>Why do you need to call clear_bats here ? load_up_mmu should load BATs.
>>If it doesn't handle the high BATs, then fix it :) 
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I will fix this...

>>>+#ifdef CONFIG_I8259_LEVEL_TRIGGER
>>>+	outb(0xfa, 0x4d0); /* level triggered */
>>>+	outb(0xde, 0x4d1);
>>>+#endif
>>>      
>>>
>>Another change that breaks multiplatform... Can you explain precisely
>>what you are trying to acheive here ? If necessary, we can add an
>>argument to i8259_init. Or you could do the above in your platform
>>code ... though I agree it would be a bit ugly :) 
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>>
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The above code is a must-have on our 8641D HPCN board to get PCI-Express 
ULI1575 southbridge going. The 8259(which is residing inside the 
southbridge) is collecting all PCI devices' interrupts( from both inside 
the ULI1575 and at its external PCI slots) before it reports to MPIC. 
PCI interrupts are level-triggered and shared thus we have to configure 
8259 to be level-triggered on this particular board.

>OK.  I don't have direct answers in hand for some of
>these questions and issues.  I'll get with original
>authors and see what we can do clean this up!
>
>Thanks!
>
>jdl
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