Subject: Interrupt occurs but UIC0 MSR is still 0

From: Chris Dumoulin <[email-masked]>
Date: Thu, 15 Jun 2006 17:38:19 -0400

Hi All,
I'm working with a 2.6 linux kernel in a board with a PPC405 in a Virtex 
II Pro FPGA. I'm trying to generate interrupts and handle them in a 
device driver that I've written.
Here is the sequence of events that happen currently:
1. I generate an interrupt by setting registers in an interrupt 
controller we've got in the FPGA (it's a Xilinx LogicCORE OPB Interrupt 
Controller).
2. The function do_IRQ, in arch/powerpc/kernel/irq.c, is called.
3. ppc_md.get_irq is called from do_IRQ.
4. ppc_md.get_irq points to ppc4xx_pic_get_irq in 
arch/ppc/syslib/ppc4xx_pic.c.
5. ppc4xx_pic_get_irq reads the MSR from UIC0 to determine the IRQ. In 
my case, the MSR is all zero, so ppc4xx_pic_get_irq returns -1.
6. After this, we return from the interrupt, and do_IRQ is called again 
and again, going through the same steps indefinitely.

I've looked at the UIC0 registers, and the SR, MSR, and ER registers are 
all 0. How can an interrupt be triggered, but all the UIC0 bits are 0? 
Is it possible that I'm not actually accessing UIC0? I've got the 
following in my arch/ppc/platforms/4xx/my_board.h file:
#define DCRN_UIC0_BASE 0x0C0
#define UIC0 DCRN_UIC0_BASE

Any ideas would be appreciated.

Cheers,
Chris Dumoulin
-- 
*--Christopher Dumoulin--*
Software Team Leader

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