From: Sergei Shtylyov <sshtylyov@ru•mvista.com>
To: Al Viro <viro@ftp•linux.org.uk>
Cc: linuxppc-dev@ozlabs•org, rmk+serial@arm•linux.org.uk
Subject: Re: [PATCH] UPIO_TSI cleanup
Date: Sun, 24 Sep 2006 19:00:32 +0400 [thread overview]
Message-ID: <45169D90.8060709@ru.mvista.com> (raw)
In-Reply-To: <E1GQvYX-0002iX-IN@ZenIV.linux.org.uk>
Hello.
Al Viro wrote:
> (le32_to_cpu(x) >> 8) & 0xff is a very odd way to spell (x >> 16) & 0xff,
> even if that code is hit only on ppc. The value is host-endian - we've
> got it from readl(), after all...
> Signed-off-by: Al Viro <viro@zeniv•linux.org.uk>
> ---
> drivers/serial/8250.c | 4 ++--
> 1 files changed, 2 insertions(+), 2 deletions(-)
> diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c
> index 0ae9ced..10c2daa 100644
> --- a/drivers/serial/8250.c
> +++ b/drivers/serial/8250.c
Shouldn't this go to rmk+serial@arm•linux.org.uk instead?
> @@ -320,8 +320,8 @@ #endif
>
> case UPIO_TSI:
> if (offset == UART_IIR) {
> - tmp = readl((u32 *)(up->port.membase + UART_RX));
> - return (cpu_to_le32(tmp) >> 8) & 0xff;
> + tmp = readl(up->port.membase + (UART_IIR & ~3));
> + return (tmp >> 16) & 0xff; /* UART_IIR % 4 == 2 */
> } else
> return readb(up->port.membase + offset);
>
I'd also like to suggest actually writing to IER in the serial_out() even
if the UUE bit is set, jusk mask 2 MSBs off (Xscale UART detection code which
breaks Tsi10x UART sould have been CONFIG_ARM dependent I think). The whole
UPIO_TSI thing looks much like an abuse to me, however it still seems to be a
necessary evil... :-/
WBR, Sergei
prev parent reply other threads:[~2006-09-24 15:00 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-09-23 0:39 [PATCH] UPIO_TSI cleanup Al Viro
2006-09-24 15:00 ` Sergei Shtylyov [this message]
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