Subject: Re: [PATCH -rt] powerpc update

From: Sergei Shtylyov <[email-masked]>
Date: Sat, 28 Oct 2006 19:33:42 +0400

Hello, I wrote:

> 3. Do the same as x86 APIC driver does and use level/egde flows instead 
> of fasteoi for the case when IRQs are threaded -- that ensues doing (2) 
> as well.

    Note that OpenPIC (as far as I could understand its h/w) is essentially
the same as IOAPIC/LAPIC couple on x86, i.e. a level-triggered IRQ remains 
effectively globally masked until CPU writes to its local EOI reg. However, 
the repetitive edge-triggered IRQ from the same line may still be detected 
while being serviced on a CPU (hm, the questions is, can it be sent to any 
other CPU in system while being handled on a certain CPU?)...
    I hope somebody corrects me if I'm wrong about both x86 and PPC. :-)

>>     Ingo

WBR, Sergei