From: Sergei Shtylyov <sshtylyov@ru•mvista.com>
To: Gabriel Paubert <paubert@iram•es>
Cc: Olaf Hering <olaf@aepfle•de>,
linux-ide@vger•kernel.org, linuxppc-dev@ozlabs•org,
greg@kroah•com, linux-pci@atrey•karlin.mff.cuni.cz,
Alan <alan@lxorguk•ukuu.org.uk>
Subject: Re: What is the correct way to indicate an unassigned PCI resource ?
Date: Tue, 05 Dec 2006 15:38:57 +0300 [thread overview]
Message-ID: <45756861.2050004@ru.mvista.com> (raw)
In-Reply-To: <20061205105126.GC12351@iram.es>
Hello.
Gabriel Paubert wrote:
>>On Mon, 2006-12-04 at 14:22 +0000, Alan wrote:
>>>The discussion I was having was about sl82cxx and handling unassigned
>>>resources. The zero address isn't relevant to that.
>>Well, actually, it's unclear to me wether the resource is unassigned or
>>has been assigned to 0 :-) And in the later case, why claim'ing it
>>fails.
> Well, I don't have the PCI specification, but I have a device with the
Try googling for pdf21.pdf, pdf22.pdf if you need it. :-)
> following gem in its errata (name edited and changed to <Device>):
> ""The <Device> contains two PCI base registers to allow for both greater
> flexibility in tightly constrained I/O space as well as the "on the fly"
> option to access the <Device> registers from either I/O or memory space.
> Both PCI base registers contained in the <Device> will accept the value
> of "zero" as a valid and decodable address. This differs from the PCI 2.1
> specification, where a zero value being written to the PCI base register
> should disable the register space.
I haven't found such words in PCI 2.1 -- it only said that 0 is not a
valid address (those words are gone from 2.2).
> <Device> will continue to decode for
> register accesses using the value "zero" written to the PCI_BS register
> as the base address for decoding.""
I'd say it's absolutely valid bahavior.
> which makes me suspect that a base address of zero really should mean
> unassigned and is a way to disable base registers on a region by region
> basis.
AFAIR, there's never been a provision to enable/disable BARs on an
individual basis in PCI (except the expansion ROM BAR). The decoders are
only controlled via 2 command register bits for I/O and memory space.
> Now the fun with this device is that the I/O region occupies 4kB, so
That's a crappy device indeed, I/O alloction limit is 256 bytes (that's
due to PC-specific limitation actually). Such regions may (and should) be left
unassigned by f/w (and I/O decoder disabled).
> it leads to serious conflicts since there is also an ISA bridge in
> the system (no 8259 anymore, serial console dead, etc...). The best
> way to make this bug harmless is to write all ones to said base
> register (it has 32 bit). This moves it to an address which cannot
> be generated by the host bridge (unless you program it in a really
> weird way).
You may also completely disable the I/O decoder for this device.
> Whatever a specification says, you'll always find some device that
> has a bug in this area.
Yeah. I've already encountered such one...
WBR, Sergei
next prev parent reply other threads:[~2006-12-05 12:37 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-11-30 16:52 pata_sl82c105 can not reserve IO region Olaf Hering
2006-11-30 17:10 ` Alan
2006-11-30 18:47 ` Olaf Hering
2006-12-01 18:34 ` Olaf Hering
2006-12-01 18:58 ` Alan
2006-12-01 19:05 ` Sergei Shtylyov
2006-12-01 21:53 ` Benjamin Herrenschmidt
2006-12-01 22:15 ` Alan
2006-12-01 22:19 ` Benjamin Herrenschmidt
2006-12-02 14:36 ` U-Boot allocating PCI I/O space from 0 (Was: pata_sl82c105 can not reserve IO region) Sergei Shtylyov
2006-12-02 16:33 ` Sergei Shtylyov
2006-12-26 20:53 ` [U-Boot-Users] " Sergei Shtylyov
2006-12-03 23:39 ` pata_sl82c105 can not reserve IO region Alan
2006-12-03 17:12 ` Olaf Hering
2006-12-03 22:24 ` Olaf Hering
2006-12-03 23:23 ` Alan
2006-12-04 0:30 ` Olaf Hering
2006-12-04 9:21 ` Olaf Hering
2006-12-03 23:07 ` Alan
2006-12-04 12:38 ` [PATCH] mark PCI resource with start 0 as unassigned Olaf Hering
2006-12-04 12:44 ` Segher Boessenkool
2006-12-04 12:50 ` Sergei Shtylyov
2006-12-04 12:54 ` Segher Boessenkool
2006-12-04 13:08 ` Sergei Shtylyov
2006-12-04 13:21 ` Alan
2006-12-04 13:25 ` Segher Boessenkool
2006-12-04 14:15 ` Alan
2007-08-01 14:22 ` Sergei Shtylyov
2007-08-01 15:51 ` Alan Cox
2007-08-06 18:04 ` Segher Boessenkool
2007-08-06 19:52 ` Alan Cox
2007-08-06 22:14 ` Benjamin Herrenschmidt
2006-12-04 13:27 ` Sergei Shtylyov
2006-12-04 14:22 ` What is the correct way to indicate an unassigned PCI resource ? Alan
2006-12-04 14:34 ` Sergei Shtylyov
2006-12-04 14:44 ` Alan
2006-12-04 15:40 ` Sergei Shtylyov
2006-12-04 15:55 ` Sergei Shtylyov
2006-12-04 20:53 ` Guennadi Liakhovetski
2006-12-05 4:43 ` Benjamin Herrenschmidt
2006-12-05 4:41 ` Benjamin Herrenschmidt
2006-12-05 8:15 ` Olaf Hering
2006-12-05 20:19 ` Benjamin Herrenschmidt
2006-12-05 21:26 ` Sergei Shtylyov
2007-01-04 17:49 ` Olaf Hering
2007-01-04 21:30 ` Benjamin Herrenschmidt
2007-01-05 10:26 ` Olaf Hering
2007-01-05 12:05 ` Benjamin Herrenschmidt
2006-12-05 10:51 ` Gabriel Paubert
2006-12-05 12:38 ` Sergei Shtylyov [this message]
2006-12-05 17:37 ` Grant Grundler
2006-12-05 19:22 ` Sergei Shtylyov
2006-12-04 12:56 ` [PATCH] mark PCI resource with start 0 as unassigned Olaf Hering
2006-12-04 13:05 ` Segher Boessenkool
2006-12-04 12:47 ` Sergei Shtylyov
2006-12-04 12:40 ` [PATCH] add delay around sl82c105_reset_engine calls Olaf Hering
2006-12-04 13:02 ` Alan
2006-12-04 13:12 ` Olaf Hering
2007-01-04 6:42 ` Olaf Hering
2007-01-04 10:53 ` Alan
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