From: David Hawkins <dwh@ovro•caltech.edu>
To: Leonid <Leonid@a-k-a•net>
Cc: linuxppc-embedded <linuxppc-embedded@ozlabs•org>
Subject: Re: PCI target implementation on AMCC PPC CPUs
Date: Thu, 06 Sep 2007 19:34:11 -0700 [thread overview]
Message-ID: <46E0B8A3.3010305@ovro.caltech.edu> (raw)
In-Reply-To: <406A31B117F2734987636D6CCC93EE3C022418FF@ehost011-3.exch011.intermedia.net>
Hi guys,
> You want to say PPC440GP cannot be PCI slave without
> this non-transparent bridge because as David said
> its "interrupt pin register hardwired to zero" or
> there other reasons? I'm trying to use
> PPC440ep(or epx) and from its datasheet I don't
> see anything about this zero hardwiring.
> Does it mean "vanilla" PPC440ep will work?
Look in the user manual p562
https://www.amcc.com/MyAMCC/retrieveDocument/PowerPC/440GP/PPC440GP_UM2002_v1_11.pdf
The processor can generate INTA#.
> I have been finished an application using AMCC
> PPC440GP as PCI target(slave) in the last 2 month.
> I use a non-transparent bridge(AMCC PCI6466) to
> make the device a target(slave) like david has said.
However in this case, the bridge was not required
to make the processor target-capable. Most likely
the board required a local PCI bus, and so the
non-transparent bridge is used to hide the board
PCI devices from the other PCI host.
In this type of design the processor is acting
a *host* on the target board. When a host wants
to interrupt the target, it asserts an interrupt
in the bridge, and that interrupt asserts an
interrupt input on the processor.
When the target processor wants to interrupt the
host it writes to a register in the bridge and
the bridge interrupt the host using its INTA#.
In both cases the bridge is the target and the
processors are both hosts.
:)
Dave
next prev parent reply other threads:[~2007-09-07 2:32 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <46E0B178.00C522.05513@m5-81.163.com>
2007-09-07 2:13 ` Re: PCI target implementation on AMCC PPC CPUs Leonid
2007-09-07 2:34 ` David Hawkins [this message]
2007-09-06 18:24 finding out the processor frequency Leisner, Martin
2007-09-06 18:43 ` Scott Wood
2007-09-06 19:15 ` PCI target implementation on AMCC PPC CPUs Leonid
2007-09-06 20:15 ` David Hawkins
2007-09-06 23:30 ` Wolfgang Denk
2007-09-06 23:39 ` David Hawkins
2007-09-06 20:26 ` David Hawkins
2007-09-11 9:13 ` Matthias Fuchs
2007-09-11 17:32 ` David Hawkins
2007-09-11 18:17 ` David Hawkins
2007-09-12 7:17 ` Matthias Fuchs
2007-09-12 16:04 ` David Hawkins
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=46E0B8A3.3010305@ovro.caltech.edu \
--to=dwh@ovro$(echo .)caltech.edu \
--cc=Leonid@a-k-a$(echo .)net \
--cc=linuxppc-embedded@ozlabs$(echo .)org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox