Subject: Re: [PATCH 2/3][POWERPC][V2] Xilinx: of_serial support for Xilinx uart 16550.

From: Sergei Shtylyov <[email-masked]>
Date: Thu, 03 Apr 2008 15:59:32 +0400

Hello.

Stephen Neuendorffer wrote:

> I don't think big-endian has the same context as reg-shift/reg-offset.

    The "big-endian" is about how the byte addresses are laid out, so the 
context is the same -- in this case, it would determine where each UART 
register is located within the address stride specified by "reg-shift".
It'll alwaay be at offset 0 or (2 << reg-shift) - 1 (unless some vendor goes 
and implements something with "middle-endian" layout of course :-)

> The OpenPOC is fundamentally a 32 bit device, but ns16550 is not...  If

    So what?

> we were talking about a 32 bit device, then I'd probably agree with you,

    There are 16550 clones that *are* 32-bit.

> but in this case, the reg-shift

    I'm not arguing about "reg-shift" already -- look like it's been spec'ed. :-)

> (and to some extent) reg-offset have
> been used before and probably make more sense, I think.

    The "reg-offset" has been used before? Where?

> Steve

WBR, Sergei