Subject: Problems changing ethernet phy settings with LXT973 (and 8555)

From: Ben Gamsa <[email-masked]>
Date: Fri, 30 May 2008 18:16:08 -0400

I'm not sure if this is the right place to post, but it's one of the few
places that seems relevant (the other I think would be linuxppc-embedded).

Our board is using an 8555 with an LXT973 dual-phy chip hooked up to TSEC0
and TSEC1.

We're currently using 2.6.20 but I don't see any major changes in the 2.6.25
release in the area of the phy driver.  We're using the gianfar driver, with
the generic phy driver.  When the phy driver writes to BMCR to turn off
auto-negotiation and set the speed and duplex, it appears that none of the
writes except the RESET bit take effect.  Reading back the register
immediately shows the RESET bit set, but none of the other changes (later
the RESET bit is cleared, but again, none of the changes are visible).

One possibility was that the LXT973 was wired up to come up in hardware
control mode, where it's supposed to ignore all writes (I'm not sure if
there is supposed to be an exception for the RESET bit or not in this case),
but that appears not to be the case.

I was wondering if anyone has any idea as to what might be the source of
this problem, or if anyone has any suggestions as to avenues of investigation
to track it down.

-- 
Ben Gamsa             [email-masked]
SOMA Networks, Inc.   312 Adelaide St. W. Suite 600 Toronto, Ontario, M5V1R2