Subject: Re: [PATCH] powerpc: i2c-mpc: make speed registers configurable via FDT

From: Wolfgang Grandegger <[email-masked]>
Date: Thu, 31 Jul 2008 13:51:32 +0200

Grant Likely wrote:
> On Fri, Jul 25, 2008 at 11:19:41AM -0500, Timur Tabi wrote:
>> Wolfgang Grandegger wrote:
>>
>>> I know but we still need an algorithm for MPC52xx and MPC82xx as well.
>> That's true, but I still think hard-coding values of DFSR and FDR in the device
>> tree is not a good way to do this.
> 
> I agree, it should encode real frequencies, not raw register values.

Digging deeper I'm frightened by plenty of platform specific code. We 
would need:

- one table of divider,fdr,dfsr values for the MPC82/3/5/6xx processors
   (already available from Timur's U-Boot implementation)

- one table of divider,fdr values for the MPC5200 rev A.

- one table of divider,fdr values for the MPC5200 rev B.
   (the Rev. B has two more pre-scaler bits).

- furthermore, there are various mpc-specific I2C clock sources:

   MPC82xx                     : fsl_get_sys_freq()
   MPC5200                     : IPB
   MPC83xx                     : fsl_get_sys_freq()
   MPC8540/41/60/55,MPC8610    : fsl_get_sys_freq()
   MPC8543/45/47/48/68, MPC8641: fsl_get_sys_freq()/2
   MPC8544                     : fsl_get_sys_freq()/2 or /3

   It would make sense to hand-over the I2C frequency from U-Boot to
   Linux.

Wolfgang.