Subject: Re: External interrupt on 460EX

From: Felix Radensky <[email-masked]>
Date: Wed, 15 Oct 2008 17:18:42 +0200

Hi, Stefan

Stefan Roese wrote:
> Felix,
>
> On Wednesday 15 October 2008, Felix Radensky wrote:
>   
>> I'm running Linux 2.6.26 on custom board based on AMCC 460EX.
>> I'm trying to catch interrupt generated by CPLD, but without any luck.
>>
>> The interrupt is connected to GPIO 45. U-Boot (1.3.4) configures this
>> pin as external interrupt 12 (interrupt 20 in UIC 3). I've added the
>> following
>> entry to board device tree (in opb section)
>>
>> cpld@2,0 {
>>     device_type = "cpld";
>>     interrupts = <20 1>;
>>     
>
> Is this interrupt active on rising edge? This is what you have configured 
> here. When you need level, active low, then you need to write:
>
>      interrupts = <20 8>;
>
> And be careful which dts version you are using. Is this 20 decimal or hex?
>
>   
The interrupt is indeed level, active low. Where can I find information 
on UIC
interrupt settings for device tree ? I'm using dtc 1.2.0, 20 is decimal. 
Is it ok ?
>>     interrupt-parent = <&UIC3>;
>> };
>>
>> In my driver I do the following:
>>
>>     /* Find CPLD node in device tree */
>>     np = of_find_node_by_type(NULL, "cpld");
>>     if (!np) {
>>         printk(KERN_INFO "No CPLD found in device tree\n");
>>         return -1;
>>     }
>>
>>     /* Get and map irq number from device tree */
>>     cpld_irq = irq_of_parse_and_map(np, 0);
>>     if (cpld_irq == NO_IRQ) {
>>         printk(KERN_ERR "irq_of_parse_and_map failed\n");
>>         of_node_put(np);
>>         return -ENODEV;
>>     }
>>
>>     /* Register CPLD interrupt handler */
>>     rc = request_irq(cpld_irq, cpld_interrupt,
>>              IRQF_TRIGGER_LOW, "CPLD", NULL);
>>
>> And I see this interrupt in /proc/interrups after loading
>> the driver. However interrupt handler is never invoked,
>> although hardware guys see that GPIO line goes down
>> when interrupt is generated.
>>
>> What am I doing wrong ?
>>     
>
> Another idea is that you didn't configure the pin multiplexing correctly. Most 
> external IRQ's are shared with other functions and/or GPIO's. You need to 
> configure the multiplexing correctly for external IRQ functionality. This is 
> usually done in U-Boot with the CFG_4xx_GPIO_TABLE. 
>
> I suggest you check here first.
>   
I've checked that, here's the relevant line from u-boot:
{GPIO1_BASE, GPIO_IN , GPIO_ALT3, GPIO_OUT_0}, /* GPIO45 CS(5)          
EOT/TC1         IRQ(12)*/

If I understand this code correctly, u-boot configures this line as ALT3 
(which is external IRQ 12)

Thanks.

Felix.