From: Wolfgang Grandegger <wg@grandegger•com>
To: Pieter <phenning@vastech•co.za>
Cc: linuxppc-dev@ozlabs•org
Subject: Re: Need help creating Device tree source for custom MPC8548 board
Date: Mon, 26 Jan 2009 10:06:50 +0100 [thread overview]
Message-ID: <497D7D2A.8090006@grandegger.com> (raw)
In-Reply-To: <497D7B37.9060909@vastech.co.za>
Pieter wrote:
> Hi all
>
> I have inherited a cusom MPC 8548 board and am currently in the
> processes of porting to U-Boot 2008 and Linux 2.6.27. The board worked
> using U-boot 1.2 and linux 2.6.24 not using FDT.
>
> I have completed the U-boot source and am able to boot up to the point
> where control is handed to Linux kernel , where the board hangs. This
> lead me to believe that my device tree source is not accurate.
>
> ## Transferring control to Linux (at address 00000000) ...
> Booting using OF flat tree...
>
> I assembled a minimal "equus.dts" by using the tqm8458.dts and
> sbc8548.dts as examples and the "Booting the Linux/ppc kernel without
> Open Firmware" document supplied with Lnux 2.6.27. I am uncertain about
> assigning interrupts to the variouse nodes.
>
> I compiled the blob using dtc Version: 1.1.0:
> dtc -b 0 -V 17 -p 0x2000 -I dts -R 8 -O dtb -f
> arch/powerpc/boot/dts/equus.dts > SDH0/tftp/equus.dtb
>
> can anyone please help? My device tree source is as follows:
>
> /dts-v1/;
> / {
> model = "EQUUS";
> compatible = "Equus 2009";
> #address-cells = <1>;
> #size-cells = <1>;
> aliases {
> ethernet0 = &enet0;
> ethernet1 = &enet1;
> ethernet2 = &enet2;
> serial0 = &serial1;
> serial1 = &serial0;
> };
>
> cpus {
> #address-cells = <1>;
> #size-cells = <0>;
> PowerPC,8548@0 {
> device_type = "cpu";
> reg = <0>;
> d-cache-line-size = <0x20>; // 32 bytes
> i-cache-line-size = <0x20>; // 32 bytes
> d-cache-size = <0x8000>; // L1, 32K
> i-cache-size = <0x8000>; // L1, 32K
> timebase-frequency = <0>; // From uboot
> bus-frequency = <0>; // From uboot
> clock-frequency = <0>; // From uboot
> next-level-cache = <&L2>;
> };
> };
>
> memory {
> device_type = "memory";
> reg = <0x00000000 0x20000000>; //512M at 0x0
> };
>
> soc8548@e0000000 {
> #address-cells = <1>;
> #size-cells = <1>;
> device_type = "soc";
> ranges = <0x00000000 0xe0000000 0x00100000>;
> reg = <0xe0000000 0x00001000>; // CCSRBAR
Does this address match the one set by U-Boot? Also check all other
addresses for PCI, etc.
Wolfgang.
next prev parent reply other threads:[~2009-01-26 9:06 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-01-26 8:58 Need help creating Device tree source for custom MPC8548 board Pieter
2009-01-26 9:06 ` Wolfgang Grandegger [this message]
2009-01-26 14:55 ` Pieter
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