Subject: Re: [PATCH 4/4] powerpc/85xx: TQM8548: Update DTS file for multi-chip support

From: Wolfgang Grandegger <[email-masked]>
Date: Wed, 18 Mar 2009 08:34:58 +0100

Anton Vorontsov wrote:
> On Tue, Mar 17, 2009 at 10:12:22AM +0100, Wolfgang Grandegegr wrote:
>> From: Wolfgang Grandegger <[email-masked]>
>>
>> This patch adds multi-chip support for the Micron MT29F8G08FAB NAND
>> flash memory on the TQM8548 modules.
>>
>> This patch should go through the powerpc/85xx channel.
>>
>> Signed-off-by: Wolfgang Grandegger <[email-masked]>
>> ---
>>  arch/powerpc/boot/dts/tqm8548.dts |    5 +++++
>>  1 files changed, 5 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tqm8548.dts
>> index 81d3fbb..e5c3c67 100644
>> --- a/arch/powerpc/boot/dts/tqm8548.dts
>> +++ b/arch/powerpc/boot/dts/tqm8548.dts
>> @@ -389,6 +389,11 @@
>>  			reg = <3 0x0 0x800>;
>>  			fsl,upm-addr-offset = <0x10>;
>>  			fsl,upm-cmd-offset = <0x08>;
>> +			wait-flags = <0x05>;
> 
> Should be at least fsl,upm-wait-flags. (And the flags should
> be documented in dts-bindings ;-).

OK.

>> +			/* Multi-chip device */
>> +			fsl,upm-mar-chip-offset = <0x200>;
>> +			max-chips = <2>;
> 
> num-chips would be more appropriate, no?

Yep.

> 
>> +			chip-offset = <0x200>;
> 
> I believe this is from some old code...

No, it's the address offset between the multiple chips. As Kumar already
pointed out, I also need to document the new properties.

Wolfgang.