Subject: Re: [PATCH v3 1/4] NAND: FSL-UPM: add multi chip support

From: Wolfgang Grandegger <[email-masked]>
Date: Wed, 25 Mar 2009 14:43:31 +0100

Grant Likely wrote:
> On Wed, Mar 25, 2009 at 7:31 AM, Grant Likely <[email-masked]> wrote:
>> On Wed, Mar 25, 2009 at 4:08 AM, Wolfgang Grandegger <[email-masked]> wrote:
>>> This patch adds support for multi-chip NAND devices to the FSL-UPM
>>> driver. This requires support for multiple GPIOs for the RNB pins.
>>> The NAND chips are selected through address lines defined by the
>>> FDT property "chip-offset".
>>>
>>> Signed-off-by: Wolfgang Grandegger <[email-masked]>
>> Hi Wolfgang,
>>
>> Can you please send a sample device tree snippit for this and add
>> documentation updates to your patch for the extended binding?
> 
> Oh, and cc: [email-masked] in your next posting.

OK, does patch 3/4 not already contain what you are looking for? See:

http://ozlabs.org/pipermail/linuxppc-dev/2009-March/069787.html

I separated it from the NAND patches because they go through the MTD
maintainer(s).

BTW: did you have a chance to look into the following RFC on I2C bus
speed setting?

 http://ozlabs.org/pipermail/linuxppc-dev/2009-March/069489.html

Thanks,

Wolfgang.