Subject: Re: freeze when reading a PCI bridge register

From: Nicolas Lavocat <[email-masked]>
Date: Wed, 22 Apr 2009 11:10:47 +0200

Hum... It is a proprietary bridge... I don't know how works the marvel,
but it is not like tundra (TSI108)... But  it seems that this bridge
works like X86 bridges.  I 'm goigng to read documentations about
Marvel bridges!

Nicolas Lavocat

Liu Dave-R63238 a écrit :

So the host bridge is important,
what is the bridge?

Marvell or Tundra chipset?

From:
Nicolas Lavocat [mailto:[email-masked]]

Sent: Wednesday, April 22, 2009 4:32 PM

To: Liu Dave-R63238

Cc: linuxppc-dev

Subject: Re: freeze when reading a PCI bridge register

a 7448

Liu Dave-R63238 a écrit :

I' am trying to configure a PCI bridge on a private board, with a
powerpc . In a first time, I tried to get informations about PCI
devices, in order to be sure that my read and write methods work (
using 2 configuration registers, like on an x86 architecture.) . 2
configuration registers are used, for example we write an encoded
address (it is a request to a PCI device) in the first and
the answer of
the PCI device can be read in the second register (it is a
configuration
cycle)
Firstly, I did it by JTAG: it works. Then, under uboot, it is ok.

For example, the code used under u-boot:

volatile u32* addr;
u32 vendor_device_ID;

puts("PCI1 reading PCI VENDOR and DEVICE ID\n");
addr=CFG_ADDR_PCI1;
*addr=0x80007800;

addr= CFG_DATA_PCI1;
vendor_device_ID= *addr;
printf("PCI1: PCI1_VENDOR_DEVICE_ID= %08x \n" ,vendor_device_ID);

Therefore, when I do the same thing under Linux, the system
crash when I
try to read the second register...
Linux is frozen, and there is no error message.
Under Linux, I made an ioremap before use the registers and access to
these registers thanks to functions "in_be32" and "out_be32".
I tried with different endianness to avoid an error of this type.

If I understand, the main difference between u-boot and Linux (about
registers access) is the activation of the MMU.
So I thought that problem could come from it.
I think the problem could came from the configuration of DBAT
and IBATS
registers of the MMU, but I didn't found any information
about the MMU
configuration under Linux.
So after this novel, I have some questions:

-Is the MMU configuration generic under Linux?
-Does somebody think that the problem doesn't come from MMU?
-How does work ioremap? Is it a fully software function, or does it
speaks to MMU to get the effective address from physical address?
-Does somebody have an idea, or a documentation about MMU
configuration
under linux?
-Do you think that my MMU is under the control of an evil spirit? ^^

What is the PowerPC you are using?