Subject: [PATCH] PPC440EPx SDRAM width

From: "Steven A. Falco" <[email-masked]>
Date: Thu, 23 Apr 2009 09:36:12 -0400

There is an error in the way ibm4xx_denali_fixup_memsize calculates
memory size.  When testing the DDR_REDUC bit, the polarity is
backwards.  A "1" implies 32-bit wide memory while a "0" implies
64-bit wide memory.

For a 32-bit wide system, this bug causes twice the memory to be
reported, leading to boot failure.

Signed-off-by: Steven A. Falco <[email-masked]>
---

Here is a partial log showing what happens in the
ibm4xx_denali_fixup_memsize routine.  This board has
128 Mbytes of RAM in a 32-bit wide configuration, but
the REDUC bug causes the path width to report as "8",
and the memory size to be doubled to 255 MB.  Once I
applied my patch, the memory correctly reported as
127 MB.

max_cs=00000002 max_col=0000000c max_row=0000000e
cs 00000001
path width 00000008
row=0000000d col=0000000a bank=00000004
ibm4xx_denali_fixup_memsize 10000000
Memory <- <0x0 0x0 0xffff000> (255MB)

diff --git a/arch/powerpc/boot/4xx.c b/arch/powerpc/boot/4xx.c
index 5c87843..3595c0a 100644
--- a/arch/powerpc/boot/4xx.c
+++ b/arch/powerpc/boot/4xx.c
@@ -193,9 +193,9 @@ void ibm4xx_denali_fixup_memsize(void)
        val = SDRAM0_READ(DDR0_14);

        if (DDR_GET_VAL(val, DDR_REDUC, DDR_REDUC_SHIFT))
-               dpath = 8; /* 64 bits */
-       else
                dpath = 4; /* 32 bits */
+       else
+               dpath = 8; /* 64 bits */

        /* get address pins (rows) */
        val = SDRAM0_READ(DDR0_42);