Subject: Re: Regression detecting memory size on PPC440EPx

From: Mikhail Zolotaryov <[email-masked]>
Date: Mon, 05 Oct 2009 18:38:40 +0300

Hi Mike,

Address width calculation is based on the DDR-controller configuration 
set by the bootloader. It would be helpful for further discussion if you 
could send DDR0_00..DDR0_44 register values and memory configuration 
used (no of banks, bank size, I/O width) to check calculations. Thanks.

P.S. Sequoia board also has DDR2 SDRAM from Micron.

Best regards,
Mikhail Zolotaryov

Mike Nuss wrote:
> There was a fix a while back called "Correct memory size calculation for
> Denali based boards" that corrected the data width detection in the 4xx
> bootwrapper.
>
> This seems to have had the unintended consequence of exposing another
> bug in the same code.  I have a board very similar to Sequoia, except
> that it uses a DDR2 DIMM module.  It uses a single 256MB DIMM.  After
> upgrading to the latest kernel, which includes the previously mentioned
> fix, U-Boot works fine, but the kernel detects 512MB instead, and of
> course, the kernel panics.
>
> The error seems to be in the calculation of row bits.  U-Boot's SPD
> detection says that the DIMM uses 13 bits, but I added some printf()s to
> the bootwrapper, and it is setting row to 14 instead.  I'm not too clear
> on how this code works; it calculates the row bits by subtracting the
> row from max_row, and maybe max_row is wrong?
>
> It looks like the data width bug canceled out this bug before, since
> these values end up changing the memory size by a factor of 2 (in
> opposite directions).
>
> Could someone with a better understanding of this code take a look?
>
> Thanks,
> Mike
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