Subject: I2C bus clock on MPC85XX systems

From: Felix Radensky <[email-masked]>
Date: Tue, 22 Dec 2009 17:38:29 +0200

Hi,

Almost all MPC85XX based systems have the compatible=:"fsl-i2c" in 
respective
i2c device tree nodes. This causes FSL i2c driver to use the following 
"backward
compatible" values: FSR=0x31 DFSR=0x10. This is regardless of CCB clock
frequency and i2c clock prescaler.

On my custom MPC8536 based board with 432MHz CCB clock this results in
65KHz i2c clock frequency (checked with scope). U-Boot correctly configures
the clock to 400KHz.

I've fixed the problem by modifying device tree to use different 
compatible value,
similar to what socrates board does. Is this the right approach ?

Thanks.

Felix.