From: Gary Thomas <gary@mlbassoc•com>
To: Chuck Meade <chuck@ThePTRGroup•com>
Cc: linuxppc-dev@lists•ozlabs.org
Subject: Re: UCC UART
Date: Tue, 22 Jun 2010 11:44:17 -0600 [thread overview]
Message-ID: <4C20F671.9090605@mlbassoc.com> (raw)
In-Reply-To: <4C20DC5F.80902@ThePTRGroup.com>
On 06/22/2010 09:53 AM, Chuck Meade wrote:
>>> Sure. Go to opensource.freescale.com/firmware and download (for your
>>> MPC8358)
>>> the 8360 soft UART mode microcode patch. You will need to know if
>>> your CPU
>>> is a 2.0 or 2.1 silicon, since there is a different microcode patch
>>> for each.
>>>
>>> Then in the kernel config I believe I included CONFIG_FW_LOADER and
>>> CONFIG_HOTPLUG
>>> (one of those may have autoselected the other).
>>>
>>> Make sure in your ucc_uart.c driver that soft uart mode is enabled.
>>>
>>> At boot time, the driver will kick off a 10 second timer that will expect
>>> the microcode patch to be loaded before the end of that 10 secs.
>>>
>>> Very early in my boot sequence, I have a startup script send the
>>> microcode patch
>>> file to the driver through the firmware-loading sysfs entry. But you
>>> need to
>>> be aware that the UCC number in the sysfs path will be offset by one.
>>> Since you
>>> are using UCC3, you should use a '2' in the path as shown below. This
>>> sequence
>>> worked for me (I changed the number for you to '2' in my command
>>> sequence, since
>>> I use a different UCC):
>>>
>>> echo 1> /sys/class/firmware/fsl-ucc-uart2/loading
>>> cat /root/fsl_qe_ucode_uart_8360_21.bin>
>>> /sys/class/firmware/fsl-ucc-uart2/data
>>> echo 0> /sys/class/firmware/fsl-ucc-uart2/loading
>>>
>>> Note that the above presupposes you are using the file for silicon 2.1.
>>> Also presupposes that you have put the microcode under your rootfs
>>> /root directory.
>>
>> Thanks, I'll give this a try. When I download the firmware this way,
>> do I need to follow the directions in
>> Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/firmware.txt
>
> I did not do that, and I have it running here. I will say though that I
> hardcoded the driver to run in soft UART mode. You will need to at least
> add the appropriate line to your dts to get the driver to operate in
> Soft UART mode.
>
> I hardcoded mine because I had to backport this UCC UART driver to an older
> Linux kernel, and that kernel was from before dts existed.
>
> Add whatever you need to your dts to make it run in soft UART mode and get
> the firmware loaded. Use two different BRGs for tx and rx. Make sure your
> BRG choice is valid for your UCC3.
>
> I believe that the UCC UART support has not had too much use so far, but
> I do have it working (in that older kernel after backporting).
I've done all this but sadly the behaviour is the same :-(
Any ideas what I might be missing?
--
------------------------------------------------------------
Gary Thomas | Consulting for the
MLB Associates | Embedded world
------------------------------------------------------------
next prev parent reply other threads:[~2010-06-22 17:44 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-06-22 14:55 UCC UART Gary Thomas
2010-06-22 15:06 ` Tabi Timur-B04825
2010-06-22 15:10 ` Chuck Meade
2010-06-22 15:14 ` Gary Thomas
2010-06-22 15:28 ` Chuck Meade
2010-06-22 15:46 ` Gary Thomas
2010-06-22 15:53 ` Chuck Meade
2010-06-22 17:44 ` Gary Thomas [this message]
2010-06-22 18:14 ` Chuck Meade
2010-06-22 18:41 ` Gary Thomas
2010-06-22 19:01 ` Chuck Meade
2010-06-22 21:19 ` Gary Thomas
2010-06-22 21:27 ` Chuck Meade
[not found] ` <4C20D162.2020302@freescale.com>
2010-06-24 21:20 ` Timur Tabi
2010-06-25 0:49 ` Gary Thomas
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