From: David Daney <ddaney@caviumnetworks•com>
To: Fushen Chen <fchen@apm•com>, linux-usb@vger•kernel.org
Cc: linuxppc-dev@ozlabs•org, gregkh@suse•de,
Mark Miesfeld <mmiesfeld@apm•com>
Subject: Re: [PATCH V5 9/9] Add Synopsys DesignWare HS USB OTG driver kernel configuration and Makefile.
Date: Thu, 21 Oct 2010 10:49:13 -0700 [thread overview]
Message-ID: <4CC07D19.9000404@caviumnetworks.com> (raw)
In-Reply-To: <1287621776656-git-send-email-fchen@apm.com>
On 10/20/2010 05:42 PM, Fushen Chen wrote:
> Signed-off-by: Fushen Chen<fchen@apm•com>
> Signed-off-by: Mark Miesfeld<mmiesfeld@apm•com>
> ---
> drivers/Makefile | 1 +
> drivers/usb/Kconfig | 2 +
> drivers/usb/dwc_otg/Kconfig | 99 ++++++++++++++++++++++++++++++++++++++++++
> drivers/usb/dwc_otg/Makefile | 19 ++++++++
> 4 files changed, 121 insertions(+), 0 deletions(-)
> create mode 100644 drivers/usb/dwc_otg/Kconfig
> create mode 100644 drivers/usb/dwc_otg/Makefile
>
> diff --git a/drivers/Makefile b/drivers/Makefile
> index a2aea53..36cb201 100644
> --- a/drivers/Makefile
> +++ b/drivers/Makefile
> @@ -67,6 +67,7 @@ obj-$(CONFIG_UWB) += uwb/
> obj-$(CONFIG_USB_OTG_UTILS) += usb/otg/
> obj-$(CONFIG_USB) += usb/
> obj-$(CONFIG_USB_MUSB_HDRC) += usb/musb/
> +obj-$(CONFIG_USB_DWC_OTG) += usb/dwc_otg/
> obj-$(CONFIG_PCI) += usb/
> obj-$(CONFIG_USB_GADGET) += usb/gadget/
> obj-$(CONFIG_SERIO) += input/serio/
> diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
> index 4aa00e6..bbb8b2c 100644
> --- a/drivers/usb/Kconfig
> +++ b/drivers/usb/Kconfig
> @@ -114,6 +114,8 @@ source "drivers/usb/host/Kconfig"
>
> source "drivers/usb/musb/Kconfig"
>
> +source "drivers/usb/dwc_otg/Kconfig"
> +
> source "drivers/usb/class/Kconfig"
>
> source "drivers/usb/storage/Kconfig"
> diff --git a/drivers/usb/dwc_otg/Kconfig b/drivers/usb/dwc_otg/Kconfig
> new file mode 100644
> index 0000000..174141d
> --- /dev/null
> +++ b/drivers/usb/dwc_otg/Kconfig
> @@ -0,0 +1,99 @@
> +#
> +# USB Dual Role (OTG-ready) Controller Drivers
> +# for silicon based on Synopsys DesignWare IP
> +#
> +
> +comment "Enable Host or Gadget support for DesignWare OTG controller"
> + depends on !USB&& USB_GADGET=n
> +
> +config USB_DWC_OTG
> + depends on (USB || USB_GADGET)
> + depends on 405EZ || 405EX || 460EX
How about 'depends on HAS_USB_DWC_OTG' then select HAS_USB_DWC_OTG in
the Kconfig of the chips that have this device.
That way all the information about a given device is concentrated in its
own Kconfig file and this line doesn't grow without limit as new devices
add support for this driver. I know for a fact that there are several
other processors supported by the kernel that have this device and they
will want to add support once the driver is merged.
There are a lot of chip specific config variables below as well.
Perhaps they could be rearranged in a similar manner.
David Daney
> + select NOP_USB_XCEIV
> + select USB_OTG_UTILS
> + tristate "Synopsys DWC OTG Controller"
> + default USB_GADGET
> + help
> + This driver provides USB Device Controller support for the
> + Synopsys DesignWare USB OTG Core used on the AppliedMicro PowerPC SoC.
> +
> +config DWC_DEBUG
> + bool "Enable DWC Debugging"
> + depends on USB_DWC_OTG
> + default n
> + help
> + Enable DWC driver debugging
> +
> +choice
> + prompt "DWC Mode Selection"
> + depends on USB_DWC_OTG
> + default DWC_HOST_ONLY
> + help
> + Select the DWC Core in OTG, Host only, or Device only mode.
> +
> +config DWC_HOST_ONLY
> + bool "DWC Host Only Mode" if 405EX || 460EX
> +
> +config DWC_OTG_MODE
> + bool "DWC OTG Mode" if 405EX || 460EX
> + select USB_GADGET_SELECTED
> +
> +config DWC_DEVICE_ONLY
> + bool "DWC Device Only Mode"
> + select USB_GADGET_SELECTED
> +
> +endchoice
> +
> +# enable peripheral support (including with OTG)
> +config USB_GADGET_DWC_HDRC
> + bool
> + depends on USB_DWC_OTG&& (DWC_DEVICE_ONLY || USB_DWC_OTG)
> +
> +choice
> + prompt "DWC DMA/SlaveMode Selection"
> + depends on USB_DWC_OTG
> + default DWC_DMA_MODE
> + help
> + Select the DWC DMA or Slave Mode.
> + DMA mode uses the DWC core internal DMA engines.
> + Slave mode uses the processor PIO to tranfer data.
> + In Slave mode, processor's DMA channels can be used if available.
> +
> +config DWC_SLAVE
> + bool "DWC Slave Mode" if 405EX || 460EX
> +
> +config DWC_DMA_MODE
> + bool "DWC DMA Mode" if 405EX || (460EX&& \
> + (!USB_EHCI_HCD || !USB_OHCI_HCD))
> +
> +endchoice
> +
> +config USB_OTG_WHITELIST
> + bool "Rely on OTG Targeted Peripherals List"
> + depends on !USB_SUSPEND&& USB_DWC_OTG
> + default n
> + help
> + This is the same flag as in ../core/Kconfig.
> + It is here for easy deselect.
> +
> +config DWC_OTG_REG_LE
> + depends on USB_DWC_OTG
> + bool "DWC Little Endian Register" if 405EX || 460EX
> + default y
> + help
> + OTG core register access is Little-Endian.
> +
> +config DWC_OTG_FIFO_LE
> + depends on USB_DWC_OTG
> + bool "DWC FIFO Little Endian" if 405EZ
> + default n
> + help
> + OTG core FIFO access is Little-Endian.
> +
> +config DWC_LIMITED_XFER_SIZE
> + depends on USB_GADGET_DWC_HDRC
> + bool "DWC Endpoint Limited Xfer Size" if 405EZ || 405EX || 460EX
> + default n if 460EX || 405EX
> + default y if 405EZ
> + help
> + Bit fields in the Device EP Transfer Size Register is 11 bits.
> diff --git a/drivers/usb/dwc_otg/Makefile b/drivers/usb/dwc_otg/Makefile
> new file mode 100644
> index 0000000..31dd5e8
> --- /dev/null
> +++ b/drivers/usb/dwc_otg/Makefile
> @@ -0,0 +1,19 @@
> +#
> +# OTG infrastructure and transceiver drivers
> +#
> +obj-$(CONFIG_USB_DWC_OTG) += dwc_otg.o
> +
> +dwc_otg-objs := dwc_otg_cil.o dwc_otg_cil_intr.o dwc_otg_param.o
> +
> +ifeq ($(CONFIG_4xx_SOC),y)
> +dwc_otg-objs += dwc_otg_apmppc.o
> +endif
> +
> +ifneq ($(CONFIG_DWC_DEVICE_ONLY),y)
> +dwc_otg-objs += dwc_otg_hcd.o dwc_otg_hcd_intr.o \
> + dwc_otg_hcd_queue.o
> +endif
> +
> +ifneq ($(CONFIG_DWC_HOST_ONLY),y)
> +dwc_otg-objs += dwc_otg_pcd.o dwc_otg_pcd_intr.o
> +endif
next prev parent reply other threads:[~2010-10-21 18:04 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-10-21 0:42 [PATCH V5 0/9] *** Add Synopsys DesignWare HS USB OTG driver *** Fushen Chen
2010-10-21 0:42 ` [PATCH V5 1/9] Add Synopsys DesignWare HS USB OTG Control and Status Register (CSR) Fushen Chen
2010-10-21 0:42 ` [PATCH V5 2/9] Add Synopsys DesignWare HS USB OTG driver framework Fushen Chen
2010-10-21 0:42 ` [PATCH V5 3/9] Add Synopsys DesignWare HS USB OTG Core Interface Layer (CIL) Fushen Chen
2010-10-21 0:42 ` [PATCH V5 4/9] Add Synopsys DesignWare HS USB OTG HCD function Fushen Chen
2010-10-21 0:42 ` [PATCH V5 5/9] Add Synopsys DesignWare HS USB OTG HCD interrupt function Fushen Chen
2010-10-21 0:42 ` [PATCH V5 6/9] Add Synopsys DesignWare HS USB OTG HCD queue function Fushen Chen
2010-10-21 0:42 ` [PATCH V5 7/9] Add Synopsys DesignWare HS USB OTG PCD function Fushen Chen
2010-10-21 0:42 ` [PATCH V5 8/9] Add Synopsys DesignWare HS USB OTG PCD interrupt function Fushen Chen
2010-10-21 0:42 ` [PATCH V5 9/9] Add Synopsys DesignWare HS USB OTG driver kernel configuration and Makefile Fushen Chen
2010-10-21 17:49 ` David Daney [this message]
2010-10-21 6:18 ` [PATCH V5 2/9] Add Synopsys DesignWare HS USB OTG driver framework Felipe Balbi
2010-10-21 9:12 ` Alan Cox
2010-10-21 6:10 ` [PATCH V5 1/9] Add Synopsys DesignWare HS USB OTG Control and Status Register (CSR) Felipe Balbi
2010-10-21 9:06 ` Alan Cox
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