Subject: Re: [bg-linux] [PATCH 3/7] [RFC] add support for BlueGene/P FPU

From: Kazutomo Yoshii <[email-masked]>
Date: Thu, 19 May 2011 10:22:27 -0500

On 05/19/2011 08:53 AM, Eric Van Hensbergen wrote:
>>> >>  +#ifdef CONFIG_BGP
>>> >>  +#define SAVE_FPR(n, b, base) li b, THREAD_FPR0+(16*(n)); STFPDX(n, base, b)
>>> >>  +#define REST_FPR(n, b, base) li b, THREAD_FPR0+(16*(n)); LFPDX(n, base, b)
>>>        
>> >
>> >  16*?  Are these FP regs 64 or 128 bits wide?  If 128 you are doing to
>> >  have to play with TS_WIDTH to get the size of the FPs correct in the
>> >  thread_struct.
>> >
>> >  I think there's a bug here.
>> >
>>      
> I actually have three different versions of this code from different
> source patches that I'm drawing from - so your help in figuring out
> the best way to approach this is appreciated.  The kittyhawk version
> of the code has 8* instead of 16*.  According to the docs:
> "Each of the two FPU units contains 32 64-bit floating point registers
> for a total of 64 FP registers per processor." which would seem to
> point to the kittyhawk version - but they have a second SAVE_32SFPRS
> for the second hummer.  What wasn't clear to me with this version of
> the code was whether or not they were doing something clever like
> saving the pair of the 64-bit FPU registers in a single 128-bit slot
> (seems plausible).
Yes, it does.    SIMD like instructions are added to BGP PPC.
stdpdx or lfpdx, for example, handle two FPU registers (primary and 
secondary).

Thanks,
Kaz