Subject: Re: [PATCH 1/3] powerpc/mpic: finish supporting timer group B on Freescale chips

From: Scott Wood <[email-masked]>
Date: Mon, 9 Jul 2012 11:43:03 -0500

On 07/09/2012 09:12 AM, Kumar Gala wrote:
> 
> On Jul 9, 2012, at 3:45 AM, Varun Sethi wrote:
> 
>> Previously, these interrupts would be mapped, but the offset
>> calculation was broken, and only the first group was initialized.
>>
>> Signed-off-by: Scott Wood <[email-masked]>
>> ---
>> arch/powerpc/include/asm/mpic.h |    5 +++
>> arch/powerpc/sysdev/mpic.c      |   58 ++++++++++++++++++++++++++++-----------
>> 2 files changed, 47 insertions(+), 16 deletions(-)

Varun, where's your signoff?

>> +	if (mpic->flags & MPIC_FSL) {
>> +		u32 brr1 = _mpic_read(mpic->reg_type, &mpic->thiscpuregs,
>> +				      MPIC_FSL_BRR1);
>> +		u32 version = brr1 & MPIC_FSL_BRR1_VER;
>> +
>> +		/*
>> +		 * Timer group B is present at the latest in MPIC 3.1 (e.g.
>> +		 * mpc8536).  It is not present in MPIC 2.0 (e.g. mpc8544).
>> +		 * I don't know about the status of intermediate versions (or
>> +		 * whether they even exist).
>> +		 */
>> +		if (version >= 0x0301)
>> +			num_timers = 8;
>> +	}
>> +
> 
> Why don't we do this just via the device tree?

Then we'd have to change existing device trees (again), and in general
there's no reason to put it in the device tree if it's discoverable via
hardware version registers.

-Scott