Subject: Re: [PATCH V7 1/3] powerpc/pci: Make sure ISA IO base is not zero

From: Scott Wood <[email-masked]>
Date: Wed, 15 Aug 2012 12:29:15 -0500

On 08/15/2012 03:57 AM, Jia Hongtao wrote:
> From: Benjamin Herrenschmidt <[email-masked]>
> 
> Some platforms like QEMU treat 0 as an invalid address for ISA IO base.
> So we make sure that ISA IO base will never be zero. By functionality this
> is equivalent to assgin the first pci bus detected as a primary bus.
> 
> Signed-off-by: Benjamin Herrenschmidt <[email-masked]>
> Signed-off-by: Jia Hongtao <[email-masked]>

When did Ben post this?

Suggesting a temporary workaround in an e-mail is *not* the same as
posting a patch, and definitely not the same as providing a
signed-off-by which AFAICT you forged.  Don't do that.

> ---
>  arch/powerpc/kernel/pci-common.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
> index 0f75bd5..2a09aa5 100644
> --- a/arch/powerpc/kernel/pci-common.c
> +++ b/arch/powerpc/kernel/pci-common.c
> @@ -734,7 +734,7 @@ void __devinit pci_process_bridge_OF_ranges(struct pci_controller *hose,
>  			hose->io_base_virt = ioremap(cpu_addr, size);
>  
>  			/* Expect trouble if pci_addr is not 0 */
> -			if (primary)
> +			if (primary || !isa_io_base)
>  				isa_io_base =
>  					(unsigned long)hose->io_base_virt;
>  #endif /* CONFIG_PPC32 */
> 

Didn't I already point out that this has problems when the primary bus
is not the first to be probed?  If your answer is that you fix that in a
later patch, that breaks bisectability.

-Scott