From: "tiejun.chen" <tiejun.chen@windriver•com>
To: Zang Roy-R61911 <r61911@freescale•com>
Cc: Liu Qiang-B32616 <B32616@freescale•com>,
Xie Shaohui-B21989 <B21989@freescale•com>,
Fleming Andy-AFLEMING <afleming@freescale•com>,
Bhushan Bharat-R65777 <R65777@freescale•com>,
"linuxppc-dev@lists•ozlabs.org" <linuxppc-dev@lists•ozlabs.org>
Subject: Re: SATA FSL and upstreaming
Date: Thu, 16 May 2013 14:25:07 +0800 [thread overview]
Message-ID: <51947BC3.9040208@windriver.com> (raw)
In-Reply-To: <3E027F8168735B46AC006B1D0C7BB0020B1E0461@039-SN2MPN1-011.039d.mgd.msft.net>
On 05/16/2013 02:20 PM, Zang Roy-R61911 wrote:
>
>
>> -----Original Message-----
>> From: tiejun.chen [mailto:tiejun.chen@windriver•com]
>> Sent: Thursday, May 16, 2013 2:18 PM
>> To: Benjamin Herrenschmidt
>> Cc: Zang Roy-R61911; Liu Qiang-B32616; Fleming Andy-AFLEMING; linuxppc-
>> dev@lists•ozlabs.org; Xie Shaohui-B21989; Bhushan Bharat-R65777
>> Subject: Re: SATA FSL and upstreaming
>>
>> On 05/16/2013 02:09 PM, Benjamin Herrenschmidt wrote:
>>> On Thu, 2013-05-16 at 06:05 +0000, Zang Roy-R61911 wrote:
>>>> I do not suggest changing the RCW. If the RCW is broken on Ben's
>>>> side, it is not easy to recover for him.
>>>> Let's check the U-boot output first.
>>>
>>> U-Boot 2013.01-00009-g7bcd7f4 (Mar 14 2013 - 14:23:16)
>>>
>>> CPU0: P5020E, Version: 1.0, (0x82280010)
>>> Core: E5500, Version: 1.0, (0x80240010) Clock Configuration:
>>> CPU0:2000 MHz, CPU1:2000 MHz,
>>> CCB:800 MHz,
>>> DDR:666.667 MHz (1333.333 MT/s data rate) (Asynchronous),
>> LBC:100 MHz
>>> FMAN1: 600 MHz
>>> QMAN: 400 MHz
>>> PME: 400 MHz
>>> L1: D-cache 32 kB enabled
>>> I-cache 32 kB enabled
>>> Board: P5020DS, Sys ID: 0x1c, Sys Ver: 0x12, FPGA Ver: 0x05, vBank: 0
>>> Reset Configuration Word (RCW):
>>> 00000000: 0c540000 00000000 1e120000 00000000
>>> 00000010: d8984a01 03002000 de800000 41000000
>>> 00000020: 00000000 00000000 00000000 10070000
>>> 00000030: 00000000 00000000 00000000 00000000
>>
>> I think you can use Bharat's RCW, which seems RR_HXAPNSP_0x36, then
>> please take a look at this:
> Why?
I just believe Bharat should pick a proper RCW from SDK.
> Ben's on board RCW protocol is 0x36, which should work for PCIe1 (slot 7) and PCIe3 (slot4).
Didn't you see I'm also saying to use slot 7 and slot 4?
Tiejun
next prev parent reply other threads:[~2013-05-16 6:25 UTC|newest]
Thread overview: 78+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-16 4:47 SATA FSL and upstreaming Benjamin Herrenschmidt
2013-05-16 5:45 ` Benjamin Herrenschmidt
2013-05-16 5:55 ` tiejun.chen
2013-05-16 6:06 ` Benjamin Herrenschmidt
2013-05-16 5:59 ` Zang Roy-R61911
2013-05-16 6:01 ` Bhushan Bharat-R65777
2013-05-16 6:05 ` Zang Roy-R61911
2013-05-16 6:09 ` Benjamin Herrenschmidt
2013-05-16 6:17 ` tiejun.chen
2013-05-16 6:20 ` Zang Roy-R61911
2013-05-16 6:25 ` tiejun.chen [this message]
2013-05-16 7:20 ` Zang Roy-R61911
2013-05-16 6:26 ` Benjamin Herrenschmidt
2013-05-16 6:21 ` Benjamin Herrenschmidt
2013-05-16 6:35 ` tiejun.chen
2013-05-16 6:37 ` Zang Roy-R61911
2013-05-16 6:40 ` Benjamin Herrenschmidt
2013-05-16 6:43 ` tiejun.chen
2013-05-16 6:48 ` Bhushan Bharat-R65777
2013-05-16 6:49 ` Zang Roy-R61911
2013-05-16 6:53 ` Benjamin Herrenschmidt
2013-05-16 6:56 ` tiejun.chen
2013-05-16 7:01 ` Zang Roy-R61911
2013-05-16 7:05 ` Benjamin Herrenschmidt
2013-05-16 7:13 ` Bhushan Bharat-R65777
2013-05-16 7:26 ` Benjamin Herrenschmidt
2013-05-16 7:20 ` Xie Shaohui-B21989
2013-05-16 7:25 ` Bhushan Bharat-R65777
2013-05-16 6:59 ` Benjamin Herrenschmidt
2013-05-16 7:17 ` Zang Roy-R61911
2013-05-16 6:52 ` Benjamin Herrenschmidt
2013-05-16 14:56 ` Timur Tabi
2013-06-07 3:52 ` Benjamin Herrenschmidt
2013-06-07 4:39 ` Benjamin Herrenschmidt
2013-06-07 4:45 ` Zang Roy-R61911
2013-06-07 4:47 ` Benjamin Herrenschmidt
2013-06-07 4:50 ` Zang Roy-R61911
2013-06-07 7:41 ` fsqrt Benjamin Herrenschmidt
2013-06-07 7:45 ` fsqrt Zang Roy-R61911
2013-06-07 8:53 ` fsqrt Benjamin Herrenschmidt
2013-06-07 8:59 ` fsqrt Benjamin Herrenschmidt
2013-06-07 10:48 ` fsqrt David Laight
2013-06-07 12:14 ` fsqrt Benjamin Herrenschmidt
2013-06-07 19:19 ` fsqrt Kumar Gala
2013-06-07 23:23 ` fsqrt Benjamin Herrenschmidt
2013-06-07 23:25 ` fsqrt Benjamin Herrenschmidt
2013-06-07 23:30 ` fsqrt Benjamin Herrenschmidt
2013-06-08 0:20 ` fsqrt Dan Malek
2013-06-08 0:34 ` fsqrt Benjamin Herrenschmidt
2013-06-08 1:13 ` fsqrt Dan Malek
2013-06-08 4:31 ` fsqrt Benjamin Herrenschmidt
2013-06-09 6:32 ` fsqrt Benjamin Herrenschmidt
2013-06-07 7:46 ` fsqrt tiejun.chen
2013-06-07 8:53 ` fsqrt Benjamin Herrenschmidt
2013-06-07 9:02 ` fsqrt tiejun.chen
2013-06-07 12:07 ` fsqrt Benjamin Herrenschmidt
2013-06-07 7:05 ` FSL 64-bit DMA window question Benjamin Herrenschmidt
2013-06-07 7:58 ` Zang Roy-R61911
2013-06-07 8:55 ` Benjamin Herrenschmidt
2013-06-07 9:44 ` Zang Roy-R61911
2013-06-07 12:09 ` Benjamin Herrenschmidt
[not found] ` <1370642488.6813.15@snotra>
2013-06-07 22:02 ` Scott Wood
2013-06-07 22:09 ` Benjamin Herrenschmidt
2013-06-07 22:34 ` Scott Wood
2013-06-07 22:39 ` Benjamin Herrenschmidt
2013-06-07 23:29 ` Scott Wood
2013-06-07 23:33 ` Benjamin Herrenschmidt
2013-06-07 12:09 ` SATA FSL and upstreaming Timur Tabi
2013-05-16 6:17 ` Zang Roy-R61911
2013-05-16 6:23 ` Benjamin Herrenschmidt
2013-05-16 6:33 ` Bhushan Bharat-R65777
2013-05-16 6:34 ` Benjamin Herrenschmidt
2013-05-16 6:35 ` Zang Roy-R61911
2013-05-16 6:37 ` Benjamin Herrenschmidt
2013-05-16 6:41 ` tiejun.chen
2013-05-16 6:48 ` Zang Roy-R61911
2013-05-16 6:24 ` Xie Shaohui-B21989
2013-05-16 6:31 ` Benjamin Herrenschmidt
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