Subject: Re: [PATCH] powerpc: Fix the corrupt r3 error during MCE handling.

From: Anshuman Khandual <[email-masked]>
Date: Mon, 15 Jul 2013 11:48:18 +0530

On 07/15/2013 11:36 AM, Aneesh Kumar K.V wrote:
> Anshuman Khandual <[email-masked]> writes:
> 
>> On 07/10/2013 06:32 PM, Mahesh J Salgaonkar wrote:
>>> From: Mahesh Salgaonkar <[email-masked]>
>>>
>>> During Machine Check interrupt on pseries platform, R3 generally points to
>>> memory region inside RTAS (FWNMI) area. We see r3 corruption because when RTAS
>>> delivers the machine check exception it passes the address inside FWNMI area
>>> with the top most bit set. This patch fixes this issue by masking top two bit
>>> in machine check exception handler.
>>>
>>> Signed-off-by: Mahesh Salgaonkar <[email-masked]>
>>> ---
>>>  arch/powerpc/platforms/pseries/ras.c |    3 +++
>>>  1 file changed, 3 insertions(+)
>>>
>>> diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platforms/pseries/ras.c
>>> index 7b3cbde..721c058 100644
>>> --- a/arch/powerpc/platforms/pseries/ras.c
>>> +++ b/arch/powerpc/platforms/pseries/ras.c
>>> @@ -287,6 +287,9 @@ static struct rtas_error_log *fwnmi_get_errinfo(struct pt_regs *regs)
>>>  	unsigned long *savep;
>>>  	struct rtas_error_log *h, *errhdr = NULL;
>>>
>>> +	/* Mask top two bits */
>>> +	regs->gpr[3] &= ~(0x3UL << 62);
>>
>> We need to replace this "62" with a shift macro specifying the significance
>> of these top two address bits in the real mode.
> 
> huh??
> 
> (gdb) p/t 0x3ull << 62
> $4 = 1100000000000000000000000000000000000000000000000000000000000000
> 
> Why you need an extra comment to explain 62. But yes, we can possibly
> write that this is an RTAS bug

62 was just to point at the top two address bits in the real mode. Extra comment
request was to specify what is the RTAS behaviour or bug with respect to those top
two bits and how we are dealing with them here in this fix.