From: Victor Gallardo <victorgallardo@yahoo•com>
To: vimal singh <vimal.newwork@gmail•com>,
Sean MacLennan <smaclennan@pikatech•com>
Cc: u-boot@lists•denx.de, Stefan Roese <sr@denx•de>,
Feng Kan <fkan@amcc•com>,
linux-mtd@lists•infradead.org, linuxppc-dev@ozlabs•org
Subject: Re: [U-Boot] NAND ECC Error with wrong SMC ording bug
Date: Thu, 20 Aug 2009 23:30:45 -0700 (PDT) [thread overview]
Message-ID: <587603.70189.qm@web39805.mail.mud.yahoo.com> (raw)
In-Reply-To: <ce9ab5790908202217t2430646co5059f308a23d7397@mail.gmail.com>
Hi Vimal,=0A=0A> > With the current ndfc code, the error correction gets th=
e bits wrong.=0A> > Switching it back to the original way and the correctio=
n is correct.=0A> >=0A> > diff --git a/drivers/mtd/nand/ndfc.c b/drivers/mt=
d/nand/ndfc.c=0A> > index 89bf85a..497e175 100644=0A> > --- a/drivers/mtd/n=
and/ndfc.c=0A> > +++ b/drivers/mtd/nand/ndfc.c=0A> > @@ -101,9 +101,8 @@ st=
atic int ndfc_calculate_ecc(struct mtd_info *mtd,=0A> >=0A> > =A0 =A0 =A0 =
=A0wmb();=0A> > =A0 =A0 =A0 =A0ecc =3D in_be32(ndfc->ndfcbase + NDFC_ECC);=
=0A> > - =A0 =A0 =A0 /* The NDFC uses Smart Media (SMC) bytes order */=0A> =
> - =A0 =A0 =A0 ecc_code[0] =3D p[2];=0A> > - =A0 =A0 =A0 ecc_code[1] =3D p=
[1];=0A> > + =A0 =A0 =A0 ecc_code[0] =3D p[1];=0A> > + =A0 =A0 =A0 ecc_code=
[1] =3D p[2];=0A> > =A0 =A0 =A0 =A0ecc_code[2] =3D p[3];=0A> >=0A> > =A0 =
=A0 =A0 =A0return 0;=0A> >=0A> > Does anybody see a problem with my method =
of reproducing the bug? This=0A> > bug is deadly for our customers. I don't=
want to make the change unless=0A> > it is absolutely necessary..=0A> =0A>=
Just one question: did you enabled MTD_NAND_ECC_SMC in configs?=0A=0AYes, =
it was set.=0A=0ABest Regards,=0A=0AVictor Gallardo
next prev parent reply other threads:[~2009-08-21 6:30 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-08-17 23:00 [PATCH 1/3 v3] powerpc/32: Always order writes to halves of 64-bit PTEs Paul Mackerras
2009-08-17 23:00 ` [PATCH 2/3 v3] powerpc: Allow perf_counters to access user memory at interrupt time Paul Mackerras
2009-08-18 4:24 ` Benjamin Herrenschmidt
2009-08-17 23:01 ` [PATCH 3/3 v3] perf_counter: powerpc: Add callchain support Paul Mackerras
2009-08-18 4:23 ` Benjamin Herrenschmidt
2009-08-18 0:00 ` [PATCH 1/3 v3] powerpc/32: Always order writes to halves of 64-bit PTEs Kumar Gala
2009-08-18 0:14 ` Paul Mackerras
2009-08-18 4:24 ` Benjamin Herrenschmidt
2009-08-19 23:16 ` NAND ECC Error with wrong SMC ording bug Feng Kan
2009-08-20 4:38 ` Sean MacLennan
2009-08-20 5:01 ` [U-Boot] " Stefan Roese
2009-08-20 19:36 ` Sean MacLennan
2009-08-20 22:56 ` Victor Gallardo
2009-08-21 5:17 ` vimal singh
2009-08-21 6:26 ` Sean MacLennan
2009-08-21 6:27 ` Stefan Roese
2009-08-21 6:30 ` Victor Gallardo [this message]
2009-08-20 23:42 ` Feng Kan
2009-08-21 7:59 ` Stefan Roese
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