Subject: Re: [PATCH] powerpc/85xx: disable timebase synchronization under the hypervisor

From: Segher Boessenkool <[email-masked]>
Date: Fri, 24 Jun 2011 04:36:00 +0200

>> But does that mean that a guest should never be allowed to modify a 
>> virtualized
>> timebase register, even if the hypervisor can support it?
>
> The book3e mtspr writeup doesn't appear to specify the behavior when
> writing to a read-only SPR, so perhaps you could argue that something 
> other
> than a no-op is implementation-specific behavior.

v2.06 III-E 9.2.1:
"Writing the Time Base is hypervisor privileged."

v2.06 III-E 2.1:
"If a hypervisor-privileged register is accessed in the guest supervisor
state (MSR[GS PR] = 0b10), an Embedded Hypervisor Privilege exception 
occurs."

(v2.06 III-E 5.4.1, the big SPR table, also shows the TB regs (for 
writing,
i.e. 284 and 285) to be hypervisor privileged.  Consistency, hurray :-) 
)

Segher