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From: kajoljain <kjain@linux•ibm.com>
To: Christophe Leroy <christophe.leroy@csgroup•eu>,
	mpe@ellerman•id.au, linuxppc-dev@lists•ozlabs.org
Cc: atrajeev@linux•vnet.ibm.com, maddy@linux•ibm.com, rnsastry@linux•ibm.com
Subject: Re: [PATCH v2 2/2] powerpc/perf: Return regs->nip as instruction pointer value when SIAR is 0
Date: Mon, 16 Aug 2021 12:16:32 +0530	[thread overview]
Message-ID: <69739bed-e495-e728-4e5c-7273925c303d@linux.ibm.com> (raw)
In-Reply-To: <c6110aa1-90e2-77aa-1ab5-355975037227@csgroup.eu>



On 8/13/21 3:04 PM, Christophe Leroy wrote:
> 
> 
> Le 13/08/2021 à 10:24, Kajol Jain a écrit :
>> Incase of random sampling, there can be scenarios where SIAR is not
>> latching sample address and results in 0 value. Since current code
>> directly returning the siar value, we could see multiple instruction
>> pointer values as 0 in perf report.
>> Patch resolves this issue by adding a ternary condition to return
>> regs->nip incase SIAR is 0.
> 
> Your description seems rather similar to https://github.com/linuxppc/linux/commit/2ca13a4cc56c920a6c9fc8ee45d02bccacd7f46c
> 
> Does it mean that the problem occurs on more than the power10 DD1 ?
> 
> In that case, can the solution be common instead of doing something for power10 DD1 and something for others ?

Hi Christophe,
    Yes its better to have common check. I will make these updates.

Thanks,
Kajol Jain

> 
>>
>> Fixes: 75382aa72f06 ("powerpc/perf: Move code to select SIAR or pt_regs
>> into perf_read_regs")
>> Signed-off-by: Kajol Jain <kjain@linux•ibm.com>
>> ---
>>   arch/powerpc/perf/core-book3s.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
>> index 1b464aad29c4..aeecaaf6810f 100644
>> --- a/arch/powerpc/perf/core-book3s.c
>> +++ b/arch/powerpc/perf/core-book3s.c
>> @@ -2260,7 +2260,7 @@ unsigned long perf_instruction_pointer(struct pt_regs *regs)
>>           else
>>               return regs->nip;
>>       } else if (use_siar && siar_valid(regs))
>> -        return siar + perf_ip_adjust(regs);
>> +        return siar ? siar + perf_ip_adjust(regs) : regs->nip;
>>       else if (use_siar)
>>           return 0;        // no valid instruction pointer
>>       else
>>

  parent reply	other threads:[~2021-08-16  6:47 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-13  8:24 [PATCH v2 1/2] powerpc/perf: Use stack siar instead of mfspr Kajol Jain
2021-08-13  8:24 ` [PATCH v2 2/2] powerpc/perf: Return regs->nip as instruction pointer value when SIAR is 0 Kajol Jain
2021-08-13  9:29   ` Christophe Leroy
2021-08-14 12:25     ` Michael Ellerman
2021-08-13  9:34   ` Christophe Leroy
2021-08-14 12:44     ` Michael Ellerman
2021-08-16  6:44       ` kajoljain
2021-08-16  6:56         ` Christophe Leroy
2021-08-17  5:37           ` Madhavan Srinivasan
2021-08-17  8:29             ` kajoljain
2021-08-17 12:49           ` Michael Ellerman
2021-08-16  6:46     ` kajoljain [this message]
2021-08-13  8:29 ` [PATCH v2 1/2] powerpc/perf: Use stack siar instead of mfspr kajoljain
2021-08-13  9:23   ` Christophe Leroy
2021-08-14 12:30     ` Michael Ellerman
2021-08-16  5:58       ` kajoljain

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