From: Kumar Gala <kumar.gala@motorola•com>
To: "Matthew S. McClintock" <mattsm@arlut•utexas.edu>
Cc: <linuxppc-embedded@lists•linuxppc.org>,
Milliorn Gary-rxcr80 <Gary.Milliorn@motorola•com>
Subject: Re: TLB and CSSBAR problems with MPC8540 and BDI2000
Date: Wed, 28 Jan 2004 10:10:02 -0600 [thread overview]
Message-ID: <6DD0D5F0-51AC-11D8-BDCC-000393DBC2E8@motorola.com> (raw)
In-Reply-To: <1075305441.1204.22.camel@chuck.arlut.utexas.edu>
Matthew,
Can you try something out. I wondering if its the tlbre/tlbwe that's
causing problems or the MMU flash invalidate. (i'm guessing the 2nd.
Can you try adding this code back in and see what happens. It looks to
me that the #ifdef is to generous to start with. The invalidation of
the MMU is not really part of the work around.
#if defined(CONFIG_MPC85xx_REV1)
lis r2,0x1000
mtspr MAS0,r2
tlbre
tlbwe
isync
#if 0
li r2, 0x001e
mtspr MMUCSR0, r2
isync
#endif
#endif
- kumar
On Jan 28, 2004, at 9:57 AM, Matthew S. McClintock wrote:
>
> On Wed, 2004-01-14 at 11:19, Milliorn Gary-rxcr80 wrote:
>
>>>
>>> Yep. I have one now. Make sure your u-boot image also has a TLB1
>>> entry for your "default" CCSRBAR. Further, make sure your BDI init
>>> section doesn't move the CCSRBAR from the default value assumed by
>>> your u-boot image. I had the latter correct, just didn't realize
>>> that a "TLB1 flash invalidate" command to the MMUCSR0 doesn't seem
>>> to honor the 'invalidate protect' in the TLB entry. Everything
>>> works fine when you get all of the ducks in a row :-)
>>
>> The TLB1 issue is due to the MPC85x0 errata "CPU4"; there's a s/w
>> workaround. It's nice if BDI fixes it for you, but seems like it
>> would
>> not be necessary.
>>
>
> So I have noticed some things, maybe someone here can explain this.
> When If configure everything with my bdi2000 and attempt to boot u-boot
> my CPU will crash (COP freeze) when I get to the code that implements
> the software workaround that was mentioned above.
>
> However if I do not configure anything with the bdi2000, and boot
> u-boot, it will load just fine. I have even removed the code that
> causes
> the crash in u-boot, recompiled u-boot and with those changes u-boot
> will not crash the CPU. But, that same u-boot image will not boot if I
> do not have the bdi2000 attached.
>
> So I guess the question is, what could be configured that would cause
> this CPU to crash when the code for the errata was executed?
>
> Here is the code for the workaround:
>
> /* invalidate MMU L1/L2 */
> /* Note: before invalidate MMU L1/L2, we read TLB1 Entry 0 and then
> * write it back immediately to fixup a bug(Errata CPU4) for this
> initial
> * TLB1 entry 0,otherwise the TLB1 entry 0 will be invalidated.
> */
> #if defined(CONFIG_MPC85xx_REV1)
> lis r2,0x1000
> mtspr MAS0,r2
> tlbre
> tlbwe
> isync
> li r2, 0x001e
> mtspr MMUCSR0, r2
> isync
> #endif
>
> --
> Matthew S. McClintock <mattsm@arlut•utexas.edu>
>
>
** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
next prev parent reply other threads:[~2004-01-28 16:10 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-01-14 17:19 TLB and CSSBAR problems with MPC8540 and BDI2000 Milliorn Gary-rxcr80
2004-01-14 18:39 ` Dan Malek
2004-01-28 15:57 ` Matthew S. McClintock
2004-01-28 16:10 ` Kumar Gala [this message]
2004-01-28 16:47 ` Matthew S. McClintock
-- strict thread matches above, loose matches on Subject: below --
2004-01-09 16:42 [Q] question about using x86 gdb to debug the remote ppc target (kgdb) Christopher R. Johnson
2004-01-09 17:40 ` TLB and CSSBAR problems with MPC8540 and BDI2000 Fahd Abidi
2004-01-09 17:54 ` Dan Malek
2004-01-09 19:45 ` Matthew S. McClintock
2004-01-09 22:13 ` Dan Malek
2004-01-09 22:18 ` Matthew S. McClintock
2004-01-09 22:28 ` Dan Malek
2004-01-12 15:56 ` Dan Malek
2004-01-12 20:19 ` Matthew S. McClintock
2004-01-14 1:43 ` Dan Malek
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