Subject: Re: [RFC/PATCH] powerpc: MPC7450 L2 HW cache flush feature utilization

From: Segher Boessenkool <[email-masked]>
Date: Fri, 15 Jun 2007 10:14:24 +0200

>> Are these errata 7448-only?  If not, I wonder what is
>> done on PowerMacs?
>
> This is a errata for 7448 only. I've looked through errata for other 
> 7450 processors (7450, 7457) and they contain the same erratum for L2 
> cache: "L2 hardware flush may not flush every line from the L2 cache" 
> The workaround for this problem is: "Set the IONLY and DONLY bits in 
> the L2CR prior to the L2 hardware flush", and the projected solution 
> is: "The workaround has been documented in the MPC7450 RISC 
> Microprocessor Family User’s Manual as the correct way to flush the L2 
> cache"

Okay, so it is for all members of the 7450 family.  Good :-)

>> Looks reasonable enough to me...  if it works (on all
>> things considered "7450" by the kernel).
>
> I've double checked this. All processors considered 7450 in the kernel 
> are covered by MPC7450 RISC Microprocessor Family Reference Manual 
> where hardware cache flushing procedure is described.

Nice.  Now all that remains to be done is for the patch to
be tested on actual hardware for at least a few of those
other CPUs.  Any volunteers?

>>>      /* TODO: use HW flush assist when available */
>>
>> You want to get rid of this old comment though -- and
>> perhaps branch over the non-hardware-assisted cache
>> flushing code.
>
> Ok, I agree that the comment is obsolete now. Would you please explain 
> why the branch over non-hardware-assisted code should be removed as 
> well. Technically the cache is flushed and there is no need to use 
> extra commands to fill and then re-flush the cache.

I said such a branch should be added, not removed -- it
appears from your reply that you are skipping it already
and I just missed it?

Segher