* pcibios_fixup
@ 2002-12-13 20:51 ghannon
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From: ghannon @ 2002-12-13 20:51 UTC (permalink / raw)
To: linuxppc-dev
We are developing a custom 74xx based board with a gt64260b.
On board is a device we are acessing through pci0 on the gt64260b.
I've noticed that in the device's configuration header, the cache line
size parameter is not what I want it to be. Is pcibios_fixup the
place in the kernel to make such a change?
(that is in my specific platform_setup.c file)
Or, should I do it in the
driver that uses that device?
Thanks for any direction.
Gary Hannon
CSPI
ghannon@cspi•com
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2002-12-13 20:51 pcibios_fixup ghannon
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