Subject: Re: PPC64: G5 & 4k/64k page size (was: Re: Call for report - G5/PPC970 status)

From: "Aneesh Kumar K.V" <[email-masked]>
Date: Mon, 06 Jan 2020 19:36:38 +0530

Romain Dolbeau <[email-masked]> writes:

> Le sam. 21 déc. 2019 à 05:31, Aneesh Kumar K.V
> <[email-masked]> a écrit :
>> I don't have direct access to this system, I have asked if we can get a run
>> with 64K.
>
> OK, thanks! Do you know which model it is? It seems to be working on
> some systems,
> but we don't have enough samples to figure out why at this time, I think.
>
>> Meanwhile is there a way to find out what caused MachineCheck? more
>> details on this? I was checking the manual and I don't see any
>> restrictions w.r.t effective address. We now have very high EA with 64K
>> page size.
>
> Sorry, no idea, completely out of my depth here. I can try some kernel
> (build, runtime) options and/or patch, but someone will have to tell
> me what to try,
> as I have no ideas.

Can you try this change.

modified   arch/powerpc/include/asm/book3s/64/mmu-hash.h
@@ -580,7 +580,7 @@ extern void slb_set_size(u16 size);
 #if (MAX_PHYSMEM_BITS > MAX_EA_BITS_PER_CONTEXT)
 #define MAX_KERNEL_CTX_CNT	(1UL << (MAX_PHYSMEM_BITS - MAX_EA_BITS_PER_CONTEXT))
 #else
-#define MAX_KERNEL_CTX_CNT	1
+#define MAX_KERNEL_CTX_CNT	4
 #endif
 
 #define MAX_VMALLOC_CTX_CNT	1

-aneesh