From: "Aneesh Kumar K.V" <aneesh.kumar@linux•vnet.ibm.com>
To: Balbir Singh <bsingharora@gmail•com>,
linuxppc-dev <linuxppc-dev@ozlabs•org>,
Michael Ellerman <mpe@ellerman•id.au>
Subject: Re: [PATCH 3/3] Enable storage keys for radix - user mode execution
Date: Tue, 08 Nov 2016 21:45:36 +0530 [thread overview]
Message-ID: <874m3i2biv.fsf@linux.vnet.ibm.com> (raw)
In-Reply-To: <1478007500-23624-4-git-send-email-bsingharora@gmail.com>
Balbir Singh <bsingharora@gmail•com> writes:
> ISA 3 defines new encoded access authority that allows instruction
> access prevention in privileged mode and allows normal access
> to problem state. This patch just enables IAMR (Instruction Authority
> Mask Register), enabling AMR would require more work.
We may want to explain what the rules are with details like IAMR class 0
bit 1 controls the instruction access etc. Also we can metion that we
now setup user pages such that EAA[0] is set to 0
>
> I've tested this with a buggy driver and a simple payload. The payload
> is specific to the build I've tested.
>
> Signed-off-by: Balbir Singh <bsingharora@gmail•com>
> ---
> arch/powerpc/mm/pgtable-radix.c | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c
> index 0fdd8ed..cd3d400 100644
> --- a/arch/powerpc/mm/pgtable-radix.c
> +++ b/arch/powerpc/mm/pgtable-radix.c
> @@ -339,6 +339,24 @@ static void __init radix_init_amor(void)
> mtspr(SPRN_AMOR, amor);
> }
>
> +/*
> + * For radix page tables we setup, the IAMR values as follows
> + * IMAR = 0100...00 (key 0 is set to 1)
> + * AMR, UAMR, UAMOR are not affected
> + */
> +static void __init radix_init_iamr(void)
> +{
> + unsigned long iamr_mask = 0x4000000000000000;
> + unsigned long iamr = mfspr(SPRN_IAMR);
> +
> + if (cpu_has_feature(CPU_FTR_POWER9_DD1))
> + return;
is this needed ?
> +
> + iamr |= iamr_mask;
> +
> + mtspr(SPRN_IAMR, iamr);
> +}
Why do '|'. Who else can set this ?
> +
> void __init radix__early_init_mmu(void)
> {
> unsigned long lpcr;
> @@ -398,6 +416,7 @@ void __init radix__early_init_mmu(void)
> radix_init_amor();
> }
>
> + radix_init_iamr();
> radix_init_pgtable();
> }
What about secondary cpus ?
-aneesh
next prev parent reply other threads:[~2016-11-08 16:15 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-01 13:38 [PATCH 0/3] Enable IAMR storage keys for radix Balbir Singh
2016-11-01 13:38 ` [PATCH 1/3] Setup AMOR in HV mode Balbir Singh
2016-11-08 15:13 ` Aneesh Kumar K.V
2016-11-11 6:15 ` Balbir Singh
2016-11-01 13:38 ` [PATCH 2/3] Detect instruction fetch denied and report Balbir Singh
2016-11-08 16:09 ` Aneesh Kumar K.V
2016-11-11 6:14 ` Balbir Singh
2016-11-08 16:16 ` Aneesh Kumar K.V
2016-11-01 13:38 ` [PATCH 3/3] Enable storage keys for radix - user mode execution Balbir Singh
2016-11-08 16:15 ` Aneesh Kumar K.V [this message]
2016-11-11 6:02 ` Balbir Singh
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=874m3i2biv.fsf@linux.vnet.ibm.com \
--to=aneesh.kumar@linux$(echo .)vnet.ibm.com \
--cc=bsingharora@gmail$(echo .)com \
--cc=linuxppc-dev@ozlabs$(echo .)org \
--cc=mpe@ellerman$(echo .)id.au \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox