Subject: Re: [PATCH] Fix "ibm,processor-radix-AP-encodings"

From: "Aneesh Kumar K.V" <[email-masked]>
Date: Wed, 28 Sep 2016 08:13:48 +0530

Balbir Singh <[email-masked]> writes:

> The top 3 bits of the lower order byte should contain the
> AP encoding, we assume the top 3 bits of the MSB.

Are you sure, Power architecture documents always confuse about MSB vs
lowe order bytes. ?

>
> Signed-off-by: Balbir Singh <[email-masked]>
> ---
>
>  - Detected while reviewing Chris Smart's patch to add radix-AP-encoding
>    to skiboot
>  - Also fixed typo (sift/shift)
>
>  arch/powerpc/mm/pgtable-radix.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c
> index af897d9..d525b0b 100644
> --- a/arch/powerpc/mm/pgtable-radix.c
> +++ b/arch/powerpc/mm/pgtable-radix.c
> @@ -245,10 +245,10 @@ static int __init radix_dt_scan_page_sizes(unsigned long node,
>
>  		struct mmu_psize_def *def;
>
> -		/* top 3 bit is AP encoding */
> -		shift = be32_to_cpu(prop[0]) & ~(0xe << 28);
> -		ap = be32_to_cpu(prop[0]) >> 29;
> -		pr_info("Page size sift = %d AP=0x%x\n", shift, ap);
> +		/* top 3 bits of the lower order byte is AP encoding */
> +		shift = be32_to_cpu(prop[0]) & 0x1f;
> +		ap = (be32_to_cpu(prop[0]) >> 5) & 0x7;
> +		pr_info("Page size shift = %d AP=0x%x\n", shift, ap);
>
>  		idx = get_idx_from_shift(shift);
>  		if (idx < 0)

-aneesh