From: Nathan Lynch <nathanl@linux•ibm.com>
To: Michael Ellerman <mpe@ellerman•id.au>
Cc: tyreld@linux•ibm.com, cheloha@linux•ibm.com,
Laurent Dufour <ldufour@linux•ibm.com>,
linuxppc-dev@lists•ozlabs.org
Subject: Re: [PATCH] powerpc/pseries: explicitly reschedule during drmem_lmb list traversal
Date: Mon, 10 Aug 2020 15:03:43 -0500 [thread overview]
Message-ID: <87imdqz2sg.fsf@linux.ibm.com> (raw)
In-Reply-To: <87tuxl1ant.fsf@mpe.ellerman.id.au>
Michael Ellerman <mpe@ellerman•id.au> writes:
> One thought, which I possibly should not put in writing, is that we
> could use the alignment of the pointer as a poor man's substitute for a
> counter, eg:
>
> +static inline struct drmem_lmb *drmem_lmb_next(struct drmem_lmb *lmb)
> +{
> + if (lmb % PAGE_SIZE == 0)
> + cond_resched();
> +
> + return ++lmb;
> +}
>
> I think the lmbs are allocated in a block, so I think that will work.
> Maybe PAGE_SIZE is not the right size to use, but you get the idea.
>
> Gross I know, but might be OK as short term solution?
OK, looking into this.
next prev parent reply other threads:[~2020-08-10 20:05 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-28 17:37 [PATCH] powerpc/pseries: explicitly reschedule during drmem_lmb list traversal Nathan Lynch
2020-07-28 17:46 ` Laurent Dufour
2020-07-28 19:19 ` Nathan Lynch
2020-07-30 0:57 ` Michael Ellerman
2020-07-30 15:01 ` Nathan Lynch
2020-07-31 13:16 ` Michael Ellerman
2020-07-31 13:52 ` Nathan Lynch
2020-08-02 12:42 ` Michael Ellerman
2020-08-10 20:03 ` Nathan Lynch [this message]
2020-08-12 1:32 ` Nathan Lynch
2020-09-09 13:27 ` Michael Ellerman
2020-09-10 7:37 ` Michael Ellerman
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