From: Michael Ellerman <mpe@ellerman•id.au>
To: "Aneesh Kumar K.V" <aneesh.kumar@linux•vnet.ibm.com>,
benh@kernel•crashing.org, paulus@samba•org
Cc: linuxppc-dev@lists•ozlabs.org,
"Aneesh Kumar K.V" <aneesh.kumar@linux•vnet.ibm.com>
Subject: Re: [PATCH v7 4/7] powerpc/mm: Add radix__tlb_flush_pte
Date: Mon, 28 Nov 2016 22:42:38 +1100 [thread overview]
Message-ID: <87polfrftd.fsf@concordia.ellerman.id.au> (raw)
In-Reply-To: <20161128061704.4914-5-aneesh.kumar@linux.vnet.ibm.com>
"Aneesh Kumar K.V" <aneesh.kumar@linux•vnet.ibm.com> writes:
> diff --git a/arch/powerpc/mm/tlb-radix.c b/arch/powerpc/mm/tlb-radix.c
> index 3493cf4e0452..7648952e4f08 100644
> --- a/arch/powerpc/mm/tlb-radix.c
> +++ b/arch/powerpc/mm/tlb-radix.c
> @@ -428,3 +428,21 @@ void radix__flush_tlb_all(void)
> : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(0) : "memory");
> asm volatile("eieio; tlbsync; ptesync": : :"memory");
> }
> +
> +void radix__flush_tlb_pte(unsigned long old_pte, struct mm_struct *mm,
> + unsigned long address)
> +{
> + /*
> + * We track page size in pte only for DD1, So we can
> + * call this only on DD1.
> + */
> + if (!cpu_has_feature(CPU_FTR_POWER9_DD1)) {
> + VM_WARN_ON(1);
> + return;
> + }
That's a bit gross but I guess it's OK.
How about we give the function a name that makes it obvious as well?
Like radix__flush_tlb_pte_p9_dd1() - ugly but unlikely anyone would call
it by accident outside of a workaround.
cheers
next prev parent reply other threads:[~2016-11-28 11:42 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-28 6:16 [PATCH v7 0/7] Radix pte update tlbflush optimizations Aneesh Kumar K.V
2016-11-28 6:16 ` [PATCH v7 1/7] powerpc/mm: Rename hugetlb-radix.h to hugetlb.h Aneesh Kumar K.V
2016-11-29 11:33 ` Balbir Singh
2016-11-29 12:58 ` [v7,1/7] " Michael Ellerman
2016-11-28 6:16 ` [PATCH v7 2/7] powerpc/mm/hugetlb: Handle hugepage size supported by hash config Aneesh Kumar K.V
2016-11-29 11:35 ` Balbir Singh
2016-11-28 6:17 ` [PATCH v7 3/7] powerpc/mm: Introduce _PAGE_LARGE software pte bits Aneesh Kumar K.V
2016-11-30 0:14 ` Balbir Singh
2016-11-30 0:35 ` Benjamin Herrenschmidt
2016-11-30 0:50 ` Balbir Singh
2016-11-28 6:17 ` [PATCH v7 4/7] powerpc/mm: Add radix__tlb_flush_pte Aneesh Kumar K.V
2016-11-28 11:42 ` Michael Ellerman [this message]
2016-11-28 6:17 ` [PATCH v7 5/7] powerpc/mm: update radix__ptep_set_access_flag to not do full mm tlb flush Aneesh Kumar K.V
2016-11-28 6:17 ` [PATCH v7 6/7] powerpc/mm: update radix__pte_update " Aneesh Kumar K.V
2016-11-28 6:17 ` [PATCH v7 7/7] powerpc/mm: Batch tlb flush when invalidating pte entries Aneesh Kumar K.V
2016-11-29 11:32 ` [PATCH v7 0/7] Radix pte update tlbflush optimizations Balbir Singh
2016-11-30 4:30 ` Michael Ellerman
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