Subject: Re: [PATCH v7 4/7] powerpc/mm: Add radix__tlb_flush_pte

From: Michael Ellerman <[email-masked]>
Date: Mon, 28 Nov 2016 22:42:38 +1100

"Aneesh Kumar K.V" <[email-masked]> writes:

> diff --git a/arch/powerpc/mm/tlb-radix.c b/arch/powerpc/mm/tlb-radix.c
> index 3493cf4e0452..7648952e4f08 100644
> --- a/arch/powerpc/mm/tlb-radix.c
> +++ b/arch/powerpc/mm/tlb-radix.c
> @@ -428,3 +428,21 @@ void radix__flush_tlb_all(void)
>  		     : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(0) : "memory");
>  	asm volatile("eieio; tlbsync; ptesync": : :"memory");
>  }
> +
> +void radix__flush_tlb_pte(unsigned long old_pte, struct mm_struct *mm,
> +			  unsigned long address)
> +{
> +	/*
> +	 * We track page size in pte only for DD1, So we can
> +	 * call this only on DD1.
> +	 */
> +	if (!cpu_has_feature(CPU_FTR_POWER9_DD1)) {
> +		VM_WARN_ON(1);
> +		return;
> +	}

That's a bit gross but I guess it's OK.

How about we give the function a name that makes it obvious as well?

Like radix__flush_tlb_pte_p9_dd1() - ugly but unlikely anyone would call
it by accident outside of a workaround.

cheers