From: Heiko Carstens <hca@linux•ibm.com>
To: Mark Rutland <mark.rutland@arm•com>
Cc: Waiman.Long@hp•com,
Thomas Bogendoerfer <tsbogend@alpha•franken.de>,
Will Deacon <will@kernel•org>,
Peter Zijlstra <peterz@infradead•org>,
the arch/x86 maintainers <x86@kernel•org>,
Uros Bizjak <ubizjak@gmail•com>,
Russell King <linux@armlinux•org.uk>,
Linux Kernel Mailing List <linux-kernel@vger•kernel.org>,
linuxppc-dev@lists•ozlabs.org,
Catalin Marinas <catalin.marinas@arm•com>,
Thomas Gleixner <tglx@linutronix•de>,
Paul McKenney <paulmck@linux•vnet.ibm.com>,
Linus Torvalds <torvalds@linux-foundation•org>
Subject: Re: [PATCH 1/2] locking/lockref: Use try_cmpxchg64 in CMPXCHG_LOOP macro
Date: Fri, 27 May 2022 11:36:08 +0200 [thread overview]
Message-ID: <YpCbiBCx1o38uhhX@osiris> (raw)
In-Reply-To: <Yo91omfDZtTgXhyn@FVFF77S0Q05N.cambridge.arm.com>
On Thu, May 26, 2022 at 01:42:35PM +0100, Mark Rutland wrote:
> On Thu, May 26, 2022 at 10:14:59PM +1000, Michael Ellerman wrote:
> > Linus Torvalds <torvalds@linux-foundation•org> writes:
> > > On Wed, May 25, 2022 at 7:40 AM Uros Bizjak <ubizjak@gmail•com> wrote:
> > >>
> > >> Use try_cmpxchg64 instead of cmpxchg64 in CMPXCHG_LOOP macro.
> > >> x86 CMPXCHG instruction returns success in ZF flag, so this
> > >> change saves a compare after cmpxchg (and related move instruction
> > >> in front of cmpxchg). The main loop of lockref_get improves from:
> > >
> > > Ack on this one regardless of the 32-bit x86 question.
> > >
> > > HOWEVER.
> > >
> > > I'd like other architectures to pipe up too, because I think right now
> > > x86 is the only one that implements that "arch_try_cmpxchg()" family
> > > of operations natively, and I think the generic fallback for when it
> > > is missing might be kind of nasty.
> > >
> > > Maybe it ends up generating ok code, but it's also possible that it
> > > just didn't matter when it was only used in one place in the
> > > scheduler.
> >
> > This patch seems to generate slightly *better* code on powerpc.
> >
> > I see one register-to-register move that gets shifted slightly later, so
> > that it's skipped on the path that returns directly via the SUCCESS
> > case.
>
> FWIW, I see the same on arm64; a register-to-register move gets moved out of
> the success path. That changes the register allocation, and resulting in one
> fewer move, but otherwise the code generation is the same.
Just for the records: s390 code generation changes the same like on
powerpc; so looks good.
next prev parent reply other threads:[~2022-05-27 9:37 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CAHk-=wh1XeaxWXG5QziGA4ds918UnW1hO924kusgVB-wGj+9Og@mail.gmail.com>
2022-05-26 12:14 ` [PATCH 1/2] locking/lockref: Use try_cmpxchg64 in CMPXCHG_LOOP macro Michael Ellerman
2022-05-26 12:42 ` Mark Rutland
2022-05-27 9:36 ` Heiko Carstens [this message]
2022-05-26 16:52 ` Linus Torvalds
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